Activities Manual For Programmable Logic Controllers
5th Edition
ISBN: 9781259682476
Author: Frank Petruzella
Publisher: Mcgraw-hill Higher Education (us)
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Question
Chapter 13, Problem 22RQ
Program Plan Intro
Watchdog timer circuit:
- Watchdog timer circuit refers to a separate timing circuit.
- The processor must set as well as reset the watchdog timer within a predetermined period.
- It is used by the Programmable Logic Controller (PLC’s) to monitor the scanning process of the system.
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Students have asked these similar questions
1 typedef struct node* {
2
struct node* next;
3
char* key;
4
char* val;
5} node_t;
6
7 char* find_node (node_t* node, char* key_to_find) {
while(strcmp (node->key, key_to_find ) != 0 ) {
node = node->next;
8
9
10
}
11
return node->val;
12 }
Match each of the assembler routines on the left with the equivalent C function on
the right. Write the name of the label (e.g., foo) to the right of the corresponding
function. Note: shrq is the logical right shift instruction, and sarq is the arithmetic
right shift instruction.
foo1:
leaq
0(,%rdi, 8), %rax
long choice1 (long x)
{
ret
return x -
8 >8;
foo3:
}
movq
sarq
%rdi, %rax
$8, %rax
long choice4 (long x)
ret
{
return x*256;
}
foo4:
long choice5 (long x)
leaq
-8 (%rdi), %rax
{
ret
return x-8;
}
long choice6 (long x)
foo5:
{
leaq
-8 (%rdi), %rax
return x+8;
shrq
$63, %rax
}
ret
Given the variables and code in the text below, identify where in memory they will
live once the code is compiled.
1 char
big_array [1L<<24]; /* 16 MB */
2 GB *
:/
2 char huge_array [1L<<31]; /*
3
4 int global = 0;
5
6 int useless () { return 0; }
7
8 int main()
9 {
10
void *p1, p2, *p3, *p4;
int local =
0;
malloc (1L << 28); /* 256 MB *,
11
12
p1
13
p2
=
malloc (1L << 8);
/* 256 B *
14
p3
15
p4
=
malloc (1L << 32);
malloc (1L << 8);
/* 4
GB *
*/
/* 256
B */
16 }
Note: *pN is the thing at which pN points.
1. big_array
2. huge_array
3. global
4. useless
5. void* p1
6. *p1
7. void* p2
8. *p2
9. void* p3
10. *p3
11. void* p4
12. *p4
Chapter 13 Solutions
Activities Manual For Programmable Logic Controllers
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