You need to show detail work on how you get the answer. Dont use answers from other websites please! Please type your answer not picture 3. Suppose that a 32M x 16 main memory is built using 512K × 8 RAM chips and memory is word-addressable.  a) How many RAM chips are necessary? b) If we were accessing one full word, how many chips would be involved? c) How many address bits are needed for each RAM chip? d) How many banks will this memory have? e) How many address bits are needed for all of memory? f) If high-order interleaving is used, where would address 32(base 10) be located? (Your answer should be "Bank#, Offset#") g) Repeat (f) for low-order interleaving.

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Fundamentals of Input and Output Performance

The I/O subsystem is a component of computer system design that uses buses to assist communication between the Central Processing Unit, Computer Memory/Storage, and Input and Output Devices (that is known as peripheral devices). The I/O subsystem includes disc controllers, tape drives, discs, system buses, and other devices. The I/O database application reads and writes drives using the operating system windows I/O.