You are required to design a Common Emitter Amplifier with Voltage Divider Bias configuration of Figure 3 below. Give some justification on your design configuration.

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Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
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PART B
3. You are required to design a Common Emitter Amplifier with Voltage Divider Bias configuration of
Figure 3 below. Give some justification on your design configuration.
R, {
Rc {
VRC
2N2222
+
R2
RE E
VE
Figure 3
Given that Vcc = 24 V, Ico = 5 mA and Vg = 0.1 Vcc. The intended Q-point value should be located at the
centre on the DC load line (VCEQ = 1/2Vcc). The average B for 2N2222 transistor will be assumed to be
135. Assume 1OR2 = BRgand Vhevenin = VB. Determine the resistor values that will produce the intended
Q-point.
To test the design, simulate your design using Multisim.
ww
Transcribed Image Text:PART B 3. You are required to design a Common Emitter Amplifier with Voltage Divider Bias configuration of Figure 3 below. Give some justification on your design configuration. R, { Rc { VRC 2N2222 + R2 RE E VE Figure 3 Given that Vcc = 24 V, Ico = 5 mA and Vg = 0.1 Vcc. The intended Q-point value should be located at the centre on the DC load line (VCEQ = 1/2Vcc). The average B for 2N2222 transistor will be assumed to be 135. Assume 1OR2 = BRgand Vhevenin = VB. Determine the resistor values that will produce the intended Q-point. To test the design, simulate your design using Multisim. ww
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