Write a VHDL code to design 4-bits simple ALU to Synthesize and upload your code to the FPGA kit. ALU I/0: one 4-bits input operand and 2-bits opcode (assigned to SWs), and 4- output (assigned to LEDS). ALU operations: Opcode Operation 00 Load Output = input %3D One's complement Output = bitwise NOT (input) Output = input-1 %3D 01 Decrement %3D 10 11 Shift right by one bit Output = '0' & input (3 downto 1)

Write a VHDL code to design 4-bits simple ALU to Synthesize and upload your code to the FPGA kit. ALU I/0: one 4-bits input operand and 2-bits opcode (assigned to SWs), and 4- output (assigned to LEDS). ALU operations: Opcode Operation 00 Load Output = input %3D One's complement Output = bitwise NOT (input) Output = input-1 %3D 01 Decrement %3D 10 11 Shift right by one bit Output = '0' & input (3 downto 1)

Computer Networking: A Top-Down Approach (7th Edition)

7th Edition

ISBN:9780133594140

Author:James Kurose, Keith Ross

Publisher:James Kurose, Keith Ross

Chapter1: Computer Networks And The Internet

Section: Chapter Questions

Problem R1RQ: What is the difference between a host and an end system? List several different types of end...

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Question

Q2)
4-bits ALU
Write a VHDL code to design 4-bits simple ALU to perform the operations as described
Synthesize and upload your code to the FPGA kit.
ALU I/0: one 4-bits input operand and 2-bits opcode (assigned to SWs), and 4-
output (assigned to LEDS).
ALU operations:
Opcode
Operation
Load
Output = input
%3D
00
One's complement Output bitwise NOT (input)
Output = input-1
01
%3D
10
Decrement
%3D
11
Shift right by one bit Output = '0' & input (3 downto 1)

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