Two threads (A and B) are concurrently running on a dual-core processor that implements a sequentially consistent memory model. Assume that the value at address (R10) is initialized to 0. The instruction st immediate, (R10) writes an immediate number into the memory address stored in R10. Thread A (core 1) (R10) (R10) (R10) (R10) 0x1, R1, Ох2, Thread B (core 1) (R10) (R10) (R10) (R10) 1: st 1: st Ох3, 2: ld 2: ld R3, Ох4, R4, 3: st 3: st 4: ld R2, 4: ld After both threads have finished executing, you find that (R1, R2, R3, R4) = (1, 2, 3, 4). How many different instruction interleavings of the two threads produce this result?

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
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Two threads (A and B) are concurrently running on a dual-core processor that implements a sequentially
consistent memory model. Assume that the value at address (R10) is initialized to 0. The instruction st
immediate, (R10) writes an immediate number into the memory address stored in R10.
Thread A (core 1)
(R10)
(R10)
(R10)
(R10)
Thread B (core 1)
(R10)
(R10)
(R10)
(R10)
1:
0x1,
1:
Ох3,
R3,
Ох4,
ld
st
st
2: ld
R1,
2:
ld
3:
st
Ох2.
3:
st
4: ld
R2,
4:
R4,
After both threads have finished executing, you find that (R1, R2, R3, R4) = (1, 2, 3, 4). How many different
instruction interleavings of the two threads produce this result?
Transcribed Image Text:Two threads (A and B) are concurrently running on a dual-core processor that implements a sequentially consistent memory model. Assume that the value at address (R10) is initialized to 0. The instruction st immediate, (R10) writes an immediate number into the memory address stored in R10. Thread A (core 1) (R10) (R10) (R10) (R10) Thread B (core 1) (R10) (R10) (R10) (R10) 1: 0x1, 1: Ох3, R3, Ох4, ld st st 2: ld R1, 2: ld 3: st Ох2. 3: st 4: ld R2, 4: R4, After both threads have finished executing, you find that (R1, R2, R3, R4) = (1, 2, 3, 4). How many different instruction interleavings of the two threads produce this result?
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