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Two devices are connected by a asynchronous serial link UART) as discussed in class and in the text and lab manual. For all parts of this question, the sender is configured at 28000 paud, 7 data bits, 2 stop bits. Note that ASCII codes are in Appendix E, page 791. The ASCII code of a 'B' is send continuously from this same sender using the following 68000 code: TXBSY TXOUT equ equ $FFFFFA00 $FFFFFA02 ;initialization etc. in here ;'B' to do ;check busy bit ;back if still busy ;the 'B' output ;back until again not busy #$42, do moveq btst.b #0,TXBSY bne move.b do, TXOUT bra chkser chkser chkser f the timing of the instructions can be determined by the humber of memory cycles, calculate the approximate proportion of time actually spent putting data into the UART to he amount of time just testing to see if the UART is busy. Assume each memory cycle takes 100nsec.

Two devices are connected by a asynchronous serial link UART) as discussed in class and in the text and lab manual. For all parts of this question, the sender is configured at 28000 paud, 7 data bits, 2 stop bits. Note that ASCII codes are in Appendix E, page 791. The ASCII code of a 'B' is send continuously from this same sender using the following 68000 code: TXBSY TXOUT equ equ $FFFFFA00 $FFFFFA02 ;initialization etc. in here ;'B' to do ;check busy bit ;back if still busy ;the 'B' output ;back until again not busy #$42, do moveq btst.b #0,TXBSY bne move.b do, TXOUT bra chkser chkser chkser f the timing of the instructions can be determined by the humber of memory cycles, calculate the approximate proportion of time actually spent putting data into the UART to he amount of time just testing to see if the UART is busy. Assume each memory cycle takes 100nsec.

Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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Two devices are connected by a asynchronous serial link (UART) as discussed in class and in the text and lab manual. For all parts of this question, the sender is configured at 28000 baud, 7 data bits, 2 stop bits. Note that ASCII codes are in Appendix E, page 791. The ASCII code of a 'B' is send continuously from this same sender using the following 68000 code: $FFFFFA00 $FFFFFA02 TXBSY equ equ TXOUT ;initialization etc. in here #$42, do ;'B' to do ;check busy bit ;back if still busy ;the 'B' output ;back until again not busy moveq chkser btst.b #0,TXBSY bne move.b do, TXOUT bra chkser chkser If the timing of the instructions can be determined by the number of memory cycles, calculate the approximate proportion of time actually spent putting data into the UART to the amount of time just testing to see if the UART is busy. Assume each memory cycle takes 100nsec.
Transcribed Image Text:Two devices are connected by a asynchronous serial link (UART) as discussed in class and in the text and lab manual. For all parts of this question, the sender is configured at 28000 baud, 7 data bits, 2 stop bits. Note that ASCII codes are in Appendix E, page 791. The ASCII code of a 'B' is send continuously from this same sender using the following 68000 code: $FFFFFA00 $FFFFFA02 TXBSY equ equ TXOUT ;initialization etc. in here #$42, do ;'B' to do ;check busy bit ;back if still busy ;the 'B' output ;back until again not busy moveq chkser btst.b #0,TXBSY bne move.b do, TXOUT bra chkser chkser If the timing of the instructions can be determined by the number of memory cycles, calculate the approximate proportion of time actually spent putting data into the UART to the amount of time just testing to see if the UART is busy. Assume each memory cycle takes 100nsec.
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