To reduce access latency between different layers of the memory structure, buffers are employed in between them. List any potential buffers that might be needed for the present setup between the L1 and L2 caches and between the L2 cache and the RAM.

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
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To reduce access latency between different layers of the memory structure,
buffers are employed in between them. List any potential buffers that might be
needed for the present setup between the L1 and L2 caches and between the L2
cache and the RAM.
Transcribed Image Text:To reduce access latency between different layers of the memory structure, buffers are employed in between them. List any potential buffers that might be needed for the present setup between the L1 and L2 caches and between the L2 cache and the RAM.
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