The x86 includes the following instruction: IMUL op1, op2, immediate This instruction multiplies op2, which may be either register or memory, by the im- mediate operand value, and places the result in op1, which must be a register. There is no other three-operand instruction of this sort in the instruction set. What is the pos- sible use of such an instruction? (Hint: Consider indexing.)

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
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The x86 includes the following instruction:
IMUL op1, op2, immediate
This instruction multiplies op2, which may be either register or memory, by the im-
mediate operand value, and places the result in op1, which must be a register. There is
no other three-operand instruction of this sort in the instruction set. What is the pos-
sible use of such an instruction? (Hint: Consider indexing.)
Transcribed Image Text:The x86 includes the following instruction: IMUL op1, op2, immediate This instruction multiplies op2, which may be either register or memory, by the im- mediate operand value, and places the result in op1, which must be a register. There is no other three-operand instruction of this sort in the instruction set. What is the pos- sible use of such an instruction? (Hint: Consider indexing.)
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