The signal source in Figure B3 is v5-5sinot mV. The transistor's current gain B-120 and the Early voltage V₁=00. Neglect the impacts of capacitors. Assume VBE(on) = 0.7 V, V₁ = 0.026 V. Rg = 2.5 ΚΩ www V+ = +5 V www Rc V=-5 V 2. Find small signal parameters 9m and T RE Figure B3 3. Draw the small-signal equivalent circuit. Cc HH CE Vo 1. Design the circuit's RE and Re such that Icq = 0.25 mA and VCEQ = 3 V R₁ = 5 KQ

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Physical Constants & Semiconductor Properties
q=1.602 x 10-19 C
a = 8.854 x 10-¹2 F/m
kB = 1.380 x 10-23 J/K
me = 9.109 x 10-³1 kg
1 μm = 1 x 10 m
&-Si=11.7
- Eg
n₁ = BT ³/22kT
Drift and Diffusion Currents
J=σ E=(1/p)E
dn
dx
NMOS
p-n Junction and Diode Circuits
Vbi
w = KeTmn (NAND)
e
J₁ = eD,
r₂ =
qVD
10 = 1. [exp (2012-)-1]
=
"N₁
Vs N₂
MOS Capacitor and MOSFETS
&A
d
C=
VDs (sat) = VGS - VTN
Enbomaan
Enhancement mode
VTN >0
Depletion mode
VIN<0
K.=+H.C. (17)=+*: (1)
سال)۔
Eg-Si = 1.1 eV
Eg-GaAs = 1.4 eV
Eg-Ge=0.66 eV
nsi = 1.45 x 10¹0 cm3
1 nm = 1 x 10-⁹ m
source regulation and load regulation:
r₂
Nonsaturation region (ups < ups (sat))
iD = K₂ [2(VGS - VTN)UDS - VDS]
Saturation region (ups > Ups(sat))
iD = K (VGS - VTN)²
Transition point
ic IseBE/Vy
=
photocurrent:
ic= 1, exp
Sox (3.9) x (8.854 x 10-12) F/m
=
n² = n. p
¡E = ¹ = e/Vr
18 = ¹=¹/V₂
For both transistors
ig=ic +iB
ig = (1+B) B
α = 1+B
V, z
_V₁B
ᏙᏰ
la
* EXP (*/ /* )( 1+ ²+ )
Formula Sheet
8₂ =
= 2K (V - VTN) = 2√ √K,IDQ
Lovas -
iDeal = K₂ (VGS - VIN) ² (1+2VDs)
V₂N = V₂NO+Y(√20₁ + VS - √201)
2 fRC
V=VT In
ic
o=enfle + epμh
dp
dx
Jp =-eDp
where f=
læ
8m V₁
In (NAND)
=
= [2K (VGs - V₁N)²] = [¹
Bsi 5.23 x 10¹5 cm-³K-3/2
BGaAs = 2.10 x 10¹4 cm³ K-3/2
BGe 1.66 x 10¹5 cm²³ K-3/2
μe-si= 1400 cm² V-1 s-l
1 pm = 1 x 10-¹2 m
C = Eax A
tax
PMOS
Bipolar Junction Transistor (BJT)
Summary of the bipolar current-voltage relationships in the active region
NPN
PNP
AVEX 100%
AVps
Iph = neDA
1
27,
IsevEB/V
¡E = ¹ = ¹e¹a/V₁
iB = = ¹/V₂
ic = BiB
E
1+8
ic = aig = (i
B = 12a
C₁ =
10 = 1 [expP(+)-1]
D₂ D₂ KT
=
=
H₂ Hp 9
V.
1+K
Nonsaturation region (USD < USD (sat))
iD = Kp[2(USG + VTP) VSD - USD]
Saturation region (VSD > VSD (sat))
ip = K₂(USG + VTP)²
Transition point
USD (sat) = USG + VTP
Enhora
Enhancement mode
VTP < 0
Depletion mode
VTP > 0
W
K₂ = + H₂Ca(²+) = + k, (1/7)
V₁
Ic
Thermal Voltage V = 0.026 V
Cut-in Voltage V₂ = 0.7 V
VL,no load VL, full load
VL, full load
μhs = 450 cm² V-1 S-1
1 fm = 1 x 10-15 m
ON
-x 100%
Eax
t
Transcribed Image Text:Physical Constants & Semiconductor Properties q=1.602 x 10-19 C a = 8.854 x 10-¹2 F/m kB = 1.380 x 10-23 J/K me = 9.109 x 10-³1 kg 1 μm = 1 x 10 m &-Si=11.7 - Eg n₁ = BT ³/22kT Drift and Diffusion Currents J=σ E=(1/p)E dn dx NMOS p-n Junction and Diode Circuits Vbi w = KeTmn (NAND) e J₁ = eD, r₂ = qVD 10 = 1. [exp (2012-)-1] = "N₁ Vs N₂ MOS Capacitor and MOSFETS &A d C= VDs (sat) = VGS - VTN Enbomaan Enhancement mode VTN >0 Depletion mode VIN<0 K.=+H.C. (17)=+*: (1) سال)۔ Eg-Si = 1.1 eV Eg-GaAs = 1.4 eV Eg-Ge=0.66 eV nsi = 1.45 x 10¹0 cm3 1 nm = 1 x 10-⁹ m source regulation and load regulation: r₂ Nonsaturation region (ups < ups (sat)) iD = K₂ [2(VGS - VTN)UDS - VDS] Saturation region (ups > Ups(sat)) iD = K (VGS - VTN)² Transition point ic IseBE/Vy = photocurrent: ic= 1, exp Sox (3.9) x (8.854 x 10-12) F/m = n² = n. p ¡E = ¹ = e/Vr 18 = ¹=¹/V₂ For both transistors ig=ic +iB ig = (1+B) B α = 1+B V, z _V₁B ᏙᏰ la * EXP (*/ /* )( 1+ ²+ ) Formula Sheet 8₂ = = 2K (V - VTN) = 2√ √K,IDQ Lovas - iDeal = K₂ (VGS - VIN) ² (1+2VDs) V₂N = V₂NO+Y(√20₁ + VS - √201) 2 fRC V=VT In ic o=enfle + epμh dp dx Jp =-eDp where f= læ 8m V₁ In (NAND) = = [2K (VGs - V₁N)²] = [¹ Bsi 5.23 x 10¹5 cm-³K-3/2 BGaAs = 2.10 x 10¹4 cm³ K-3/2 BGe 1.66 x 10¹5 cm²³ K-3/2 μe-si= 1400 cm² V-1 s-l 1 pm = 1 x 10-¹2 m C = Eax A tax PMOS Bipolar Junction Transistor (BJT) Summary of the bipolar current-voltage relationships in the active region NPN PNP AVEX 100% AVps Iph = neDA 1 27, IsevEB/V ¡E = ¹ = ¹e¹a/V₁ iB = = ¹/V₂ ic = BiB E 1+8 ic = aig = (i B = 12a C₁ = 10 = 1 [expP(+)-1] D₂ D₂ KT = = H₂ Hp 9 V. 1+K Nonsaturation region (USD < USD (sat)) iD = Kp[2(USG + VTP) VSD - USD] Saturation region (VSD > VSD (sat)) ip = K₂(USG + VTP)² Transition point USD (sat) = USG + VTP Enhora Enhancement mode VTP < 0 Depletion mode VTP > 0 W K₂ = + H₂Ca(²+) = + k, (1/7) V₁ Ic Thermal Voltage V = 0.026 V Cut-in Voltage V₂ = 0.7 V VL,no load VL, full load VL, full load μhs = 450 cm² V-1 S-1 1 fm = 1 x 10-15 m ON -x 100% Eax t
The signal source in Figure B3 is v5-5sinot mV. The transistor's current gain B-120 and the Early
voltage VA=∞. Neglect the impacts of capacitors. Assume VBE(on) = 0.7 V, V₁ = 0.026 V.
V+ = +5 V
Rς = 2.5 ΚΩ
www
www
Rc
V=-5 V
2. Find small signal parameters 9m and T
RE
Figure B3
3. Draw the small-signal equivalent circuit.
Cc
HH
4. Determine the small-signal voltage gain A-
AHI
لسل
1. Design the circuit's RE and Re such that Icq = 0.25 mA and VCEQ = 3 V
Ov
R₁ = 5 KQ2
Transcribed Image Text:The signal source in Figure B3 is v5-5sinot mV. The transistor's current gain B-120 and the Early voltage VA=∞. Neglect the impacts of capacitors. Assume VBE(on) = 0.7 V, V₁ = 0.026 V. V+ = +5 V Rς = 2.5 ΚΩ www www Rc V=-5 V 2. Find small signal parameters 9m and T RE Figure B3 3. Draw the small-signal equivalent circuit. Cc HH 4. Determine the small-signal voltage gain A- AHI لسل 1. Design the circuit's RE and Re such that Icq = 0.25 mA and VCEQ = 3 V Ov R₁ = 5 KQ2
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