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The following problem concerns the way virtual addresses are translated into physical addresses. Thememory is byte addressable. • Memory accesses are to 1-byte words (not 4-byte words). • Virtual addresses are 16 bits wide. • Physical addresses are 13 bits wide. •The page size is 512 bytes. • The TLB is 8-way set associative with 16 total entries. • The cache is 2-way set associative, with a 4 byte line size and 16 total lines. In the following tables, all numbers are given in hexadecimal. The contents of the TLB, the page table for the first 32 pages, and the cache are as follows: TLB Page Table 2-way Set Associative Cache Index Tag PPN Valid VPN PPN Valid VPN PPN Valid Index Tag Valid Byte 0 Byte 1 Byte 2 Byte 3 Tag Valid Byte 0 Byte 1 Byte 2 Byte 3 0 09 4 1 00 6 1 10 0 1 0 19 1 99 11 23 11 00 0 99 11 23 11 12 2 1 01 5 0 11 5 0 1 15 0 4F 22 EC 11 2F 1 55 59 OB 41 10 0 1 02 3 1 12 2 1 2 1B 1 00 02 04 08 OB 1 01 03 05 07 08 5 03 4 1 13 4 0 3 06 0 84 06 B2 9C 12 0 84 06 B2 9C 05 7 1 04 2 0 14 6 0 4 07 0 43 6D 8F 09 05 0 43 6D 8F 09 13 1 0 05 7 1 15 10 3 0 06 1 0 16 18 3 0 07 3 0 17 1 04 0 08 5 1 18 ос 1 0 09 4 0 19 12 0 0 OA 3 0 1A 08 1 0 OB 2 0 1B 06 7 0 ос 5 0 1C 03 1 0 OD 6 0 1D 07 5 0 OE 1 1 1E 02 2 0 OF 0 0 1F 2461257623- 0 5 OD 1 36 32 00 78 1E 1 A1 B2 C4 DE 0 6 11 0 A2 37 68 31 00 1 BB 77 33 00 0 7 16 1 11 C2 11 33 1E 1 00 CO OF 00 1 0 0 0 0 0 Activa 0 0 Go to S

The following problem concerns the way virtual addresses are translated into physical addresses. Thememory is byte addressable. • Memory accesses are to 1-byte words (not 4-byte words). • Virtual addresses are 16 bits wide. • Physical addresses are 13 bits wide. •The page size is 512 bytes. • The TLB is 8-way set associative with 16 total entries. • The cache is 2-way set associative, with a 4 byte line size and 16 total lines. In the following tables, all numbers are given in hexadecimal. The contents of the TLB, the page table for the first 32 pages, and the cache are as follows: TLB Page Table 2-way Set Associative Cache Index Tag PPN Valid VPN PPN Valid VPN PPN Valid Index Tag Valid Byte 0 Byte 1 Byte 2 Byte 3 Tag Valid Byte 0 Byte 1 Byte 2 Byte 3 0 09 4 1 00 6 1 10 0 1 0 19 1 99 11 23 11 00 0 99 11 23 11 12 2 1 01 5 0 11 5 0 1 15 0 4F 22 EC 11 2F 1 55 59 OB 41 10 0 1 02 3 1 12 2 1 2 1B 1 00 02 04 08 OB 1 01 03 05 07 08 5 03 4 1 13 4 0 3 06 0 84 06 B2 9C 12 0 84 06 B2 9C 05 7 1 04 2 0 14 6 0 4 07 0 43 6D 8F 09 05 0 43 6D 8F 09 13 1 0 05 7 1 15 10 3 0 06 1 0 16 18 3 0 07 3 0 17 1 04 0 08 5 1 18 ос 1 0 09 4 0 19 12 0 0 OA 3 0 1A 08 1 0 OB 2 0 1B 06 7 0 ос 5 0 1C 03 1 0 OD 6 0 1D 07 5 0 OE 1 1 1E 02 2 0 OF 0 0 1F 2461257623- 0 5 OD 1 36 32 00 78 1E 1 A1 B2 C4 DE 0 6 11 0 A2 37 68 31 00 1 BB 77 33 00 0 7 16 1 11 C2 11 33 1E 1 00 CO OF 00 1 0 0 0 0 0 Activa 0 0 Go to S

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The following problem concerns the way virtual addresses are translated into physical addresses. Thememory is byte addressable. • Memory accesses are to 1-byte words (not 4-byte words). • Virtual addresses are 16 bits wide. • Physical addresses are 13 bits wide. •The page size is 512 bytes. • The TLB is 8-way set associative with 16 total entries. • The cache is 2-way set associative, with a 4 byte line size and 16 total lines. In the following tables, all numbers are given in hexadecimal. The contents of the TLB, the page table for the first 32 pages, and the cache are as follows: TLB Page Table 2-way Set Associative Cache Index Tag PPN Valid VPN PPN Valid VPN PPN Valid Index Tag Valid Byte 0 Byte 1 Byte 2 Byte 3 Tag Valid Byte 0 Byte 1 Byte 2 Byte 3 0 09 4 1 00 6 1 10 0 1 0 19 1 99 11 23 11 00 0 99 11 23 11 12 2 1 01 5 0 11 5 0 1 15 0 4F 22 EC 11 2F 1 55 59 OB 41 10 0 1 02 3 1 12 2 1 2 1B 1 00 02 04 08 OB 1 01 03 05 07 08 5 03 4 1 13 4 0 3 06 0 84 06 B2 9C 12 0 84 06 B2 9C 05 7 1 04 2 0 14 6 0 4 07 0 43 6D 8F 09 05 0 43 6D 8F 09 13 1 0 05 7 1 15 10 3 0 06 1 0 16 18 3 0 07 3 0 17 1 04 0 08 5 1 18 ос 1 0 09 4 0 19 12 0 0 OA 3 0 1A 08 1 0 OB 2 0 1B 06 7 0 ос 5 0 1C 03 1 0 OD 6 0 1D 07 5 0 OE 1 1 1E 02 2 0 OF 0 0 1F 2461257623- 0 5 OD 1 36 32 00 78 1E 1 A1 B2 C4 DE 0 6 11 0 A2 37 68 31 00 1 BB 77 33 00 0 7 16 1 11 C2 11 33 1E 1 00 CO OF 00 1 0 0 0 0 0 Activa 0 0 Go to S
Transcribed Image Text:The following problem concerns the way virtual addresses are translated into physical addresses. Thememory is byte addressable. • Memory accesses are to 1-byte words (not 4-byte words). • Virtual addresses are 16 bits wide. • Physical addresses are 13 bits wide. •The page size is 512 bytes. • The TLB is 8-way set associative with 16 total entries. • The cache is 2-way set associative, with a 4 byte line size and 16 total lines. In the following tables, all numbers are given in hexadecimal. The contents of the TLB, the page table for the first 32 pages, and the cache are as follows: TLB Page Table 2-way Set Associative Cache Index Tag PPN Valid VPN PPN Valid VPN PPN Valid Index Tag Valid Byte 0 Byte 1 Byte 2 Byte 3 Tag Valid Byte 0 Byte 1 Byte 2 Byte 3 0 09 4 1 00 6 1 10 0 1 0 19 1 99 11 23 11 00 0 99 11 23 11 12 2 1 01 5 0 11 5 0 1 15 0 4F 22 EC 11 2F 1 55 59 OB 41 10 0 1 02 3 1 12 2 1 2 1B 1 00 02 04 08 OB 1 01 03 05 07 08 5 03 4 1 13 4 0 3 06 0 84 06 B2 9C 12 0 84 06 B2 9C 05 7 1 04 2 0 14 6 0 4 07 0 43 6D 8F 09 05 0 43 6D 8F 09 13 1 0 05 7 1 15 10 3 0 06 1 0 16 18 3 0 07 3 0 17 1 04 0 08 5 1 18 ос 1 0 09 4 0 19 12 0 0 OA 3 0 1A 08 1 0 OB 2 0 1B 06 7 0 ос 5 0 1C 03 1 0 OD 6 0 1D 07 5 0 OE 1 1 1E 02 2 0 OF 0 0 1F 2461257623- 0 5 OD 1 36 32 00 78 1E 1 A1 B2 C4 DE 0 6 11 0 A2 37 68 31 00 1 BB 77 33 00 0 7 16 1 11 C2 11 33 1E 1 00 CO OF 00 1 0 0 0 0 0 Activa 0 0 Go to S
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