Step 1 Introduction to assembly language program Assembly language is a low-level programming language for a computer or other programmable device specific to a particular computer architecture in contrast to most high-level programming languages, which are generally portable across multiple systems. Assembly language is converted into executable machine code by a utility program referred to as an assembler like NASM, MASM, etc. Algorithm We are taking first element of array in A Comparing A with other elements of array, if A is smaller then store that element in A otherwise compare with next element The value of A is the answer Step 2 Solution 2000 LXI H 2050 H←20, L←50
Assembly language is a low-level
- We are taking first element of array in A
- Comparing A with other elements of array, if A is smaller then store that element in A otherwise compare with next element
- The value of A is the answer
| 2000 | LXI H 2050 | H←20, L←50 |
| 2003 | MOV C, M | C←M |
| 2004 | DCR C | C←C-01 |
| 2005 | INX H | HL←HL+0001 |
| 2006 | MOV A, M | A←M |
| 2007 | INX H | HL←HL+0001 |
| 2008 | CMP M | A-M |
| 2009 | JNC 200D | If Carry Flag=0, goto 200D |
| 200C | MOV A, M | A←M |
| 200D | DCR C | C←C-1 |
| 200E | JNZ 2007 | If Zero Flag=0, goto 2007 |
| 2011 | STA 3050 | A→3050 |
| 2014 | HLT |
A Instruction Set Architecture
A.1 Instruction set
We present a list of instructions typical of a RISC (reduced instruction set computer) machine. In data-movement and control instructions, the addresses may be immediate #X, direct (memory) M, indirect (memory) [M], register r, or register indirect [r] addresses. Data-processing instructions use immediate or register addressing. PC is the programme counter and a <- b indicates that the value of b is placed in a.
LOAD a, b a <- b
STOR a, b a <- b
ADD a, b, c a <- b + c
ASH a, b, c a <- (b >>[s] c)
LSH a, b, c a <- (b >>[u] c) BR a PC <- a
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SUB |
a, |
b, |
c |
a |
<- |
b |
- c |
BEQ |
a, |
b, |
c |
PC |
<- |
a |
if |
b = |
c |
|
MUL |
a, |
b, |
c |
a |
<- |
b |
* c |
BNE |
a, |
b, |
c |
PC |
<- |
a |
if |
not |
b = c |
|
DIV |
a, |
b, |
c |
a |
<- |
b |
/ c |
BLT |
a, |
b, |
c |
PC |
<- |
a |
if |
b < |
c |
|
AND |
a, |
b, |
c |
a |
<- |
b |
& c |
BGT |
a, |
b, |
c |
PC |
<- |
a |
if |
b > |
c |
OR a, b, c a <- b | c
NOT a, b a <- !b
BLE a, b, c PC <- a if b <= c BGE a, b, c PC <- a if b >= c
Note: Here b >>[s] c denotes the arithmetical shift of b to the right by c positions, and
b >>[u] c denotes the logical shift of b to the right by c positions.
A.2 The pipeline
We will use a five-stage pipeline:
- IF (instruction fetch),
- ID (instruction decode),
- RR (register read),
- EX (execute instruction),
- WB (write back result into register).
- Note that for some instructions (e.g., LOAD r, #X) some of the pipeline stages (e.g., RR) are not
A.3 Execution rules
The rules for the execution of instructions are as follows:
- All instructions go through the IF and ID stages
- For data-movement instructions the data transfer between the CPU and main mem- ory happens in the execute stage. (This means that if a data transfer operation is executing, no data can be transferred across the main-memory )
- Immediate addressing for input arguments does not require RR or EX (e.g., LOAD r1, #X).
- Arithmetic and logic instructions need RR, EX and
- Branching operations require RR, EX and WB, unless all operands are immediate, in which case only EX and WB are
- For the instruction LOAD a, b the argument b must be an immediate address or memory location and a must be a
- For the instruction STOR a, b the argument b must be an immediate address or register and a must be a memory
- For each of the remaining instructions the arguments a, b and c must all be registers or immediate
- You may assume for the sake of the questions that the ISA supports floating point arithmetic with no loss of precision
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