S Consider the following code: module D (out, a, b, c), output out input a,b.c wire e, and #(5) a1(e, a, b); or #(4) o1(out, e.c): endmodule If the input values are 000 at the beginning go the simulation, what is the value of the output at t-4 time steps? a e-1, out-1. b) e-1, out 0. e e-0, out-1. d) e-0, out-0. el ex, out-x. 6 Considerthe following code: module FF (Q, X, Clk, rst); output Q: input X, Clk, rst; reg Q; always @(negedge CLK, negedge rst) if (rst 0) Q
S Consider the following code: module D (out, a, b, c), output out input a,b.c wire e, and #(5) a1(e, a, b); or #(4) o1(out, e.c): endmodule If the input values are 000 at the beginning go the simulation, what is the value of the output at t-4 time steps? a e-1, out-1. b) e-1, out 0. e e-0, out-1. d) e-0, out-0. el ex, out-x. 6 Considerthe following code: module FF (Q, X, Clk, rst); output Q: input X, Clk, rst; reg Q; always @(negedge CLK, negedge rst) if (rst 0) Q
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
Related questions
Question
This QUESTION FROM ADVANCED DIGITAL

Transcribed Image Text:S Consider the following code:
module D (out, a, b, c);
output out input a,b.c;
wire e,
and #(5) a1(e, a, b):
or #(4) 01(out, e.c),
endmodule
If the input values are 000 at the beginning go the simulation, what is the value of the output at
t4 time steps?
a) e-1, out 1
b) e-1, out-0.
ci e0, out1.
d) e-0, out 0.
e) esx, outwx.
6 Considerthe following code:
module FF (Q, X, Clk, rst);
output Q;
input X, Clk, rst; reg Q:
always @ (negedge CLK, negedge rst)
if (rst =0) Q <a 1'b0;
else Q<= Q^ X;
endmodule
This code represents:
a) Positive edge triggered D FlipFlop.
b) Negative edge triggered DFlipFlop.
c) Positive edge triggered T FlipFlop.
d) Negative edge triggered TFlipFlop
e) None of the given
7. Consider the following part of code:
initial
begin
reset = 1'b1;
# 15 reset = 1'b0;
# 180 reset = 1'b1;
#5 reset = 1'b0;
end
initial
# 200 $finish;
initial
Smonitor($time, " Output q = %d, q);
This program terminates:
a) At time 200
b) At time 220
At time 20
c)
d) At time 15
e) None of the given options
Page 3 of 8
AAO-P10-RO1 3 30/9/2018
Expert Solution

Step 1
you put out more than one question so won't be provided an explanation.
question 5.
answer: e=0 ,out=1
question 6.
answer: positive edge trigger D flip flop.
Step by step
Solved in 2 steps

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