Repeat Problem 6.34D for a cache with a total size of 128 data bytes. dst array src array Col. 0 Col. 1 Col. 2 Col. 3 Col. 0 Col. 1 Col. 2 Col. 3 Row Row Row Row 1 1 Row Row 2 2 Row Row 3 • sizeof (int) = 4. Consider the following matrix transpose routine: The src array starts at address 0 and the dst array starts at address 64 (decimal). • There is a single L1 data cache that is direct-mapped, write- through, write-allocate, with a block size of 16 bytes. 1 typedef int array[4] [4]; • The cache has a total size of 32 data bytes, and the cache is 2 initially empty. 3 void transpose2 (array dst, array src) • Accesses to the src and dst arrays are the only sources of read 4 { and write misses, respectively. 5 int i, j: A. For each row and col, indicate whether the access to src[row][col] and dst [row][col] is a hit (h) or a miss (m). For example, reading src[0] [0] is a miss and writing dst[0] [0] is also a miss. 7 for (i = 0; i < 4; i++) { 8. for (j = 0; j < 4; j++) { dst [j] [i] = src[i][j]; 9 10 dst array sre array 11 Col. 0 Col. 1 Col. 2 Col. 3 Col. 0 Col. 1 Col. 2 Col. 3 12 Row m Row Row Row Assume this code runs on a machine with the following properties: 1 1 Row Row 2 Row Row 3 3

Repeat Problem 6.34D for a cache with a total size of 128 data bytes. dst array src array Col. 0 Col. 1 Col. 2 Col. 3 Col. 0 Col. 1 Col. 2 Col. 3 Row Row Row Row 1 1 Row Row 2 2 Row Row 3 • sizeof (int) = 4. Consider the following matrix transpose routine: The src array starts at address 0 and the dst array starts at address 64 (decimal). • There is a single L1 data cache that is direct-mapped, write- through, write-allocate, with a block size of 16 bytes. 1 typedef int array[4] [4]; • The cache has a total size of 32 data bytes, and the cache is 2 initially empty. 3 void transpose2 (array dst, array src) • Accesses to the src and dst arrays are the only sources of read 4 { and write misses, respectively. 5 int i, j: A. For each row and col, indicate whether the access to src[row][col] and dst [row][col] is a hit (h) or a miss (m). For example, reading src[0] [0] is a miss and writing dst[0] [0] is also a miss. 7 for (i = 0; i < 4; i++) { 8. for (j = 0; j < 4; j++) { dst [j] [i] = src[i][j]; 9 10 dst array sre array 11 Col. 0 Col. 1 Col. 2 Col. 3 Col. 0 Col. 1 Col. 2 Col. 3 12 Row m Row Row Row Assume this code runs on a machine with the following properties: 1 1 Row Row 2 Row Row 3 3

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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