Reorder the following instructions to speed up the execution time. Indicate how many number of clock cycles can be saved with this reordering? MOVE.W #$128, D2 DIVU #$16, D2 MOVE.W D2, (A4) LEA (A5), A3 MOVE.W #$14, (A3) ADD.W (A4)+, D6 MOVE.W D6, D2

Computer Networking: A Top-Down Approach (7th Edition)
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Author:James Kurose, Keith Ross
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Chapter1: Computer Networks And The Internet
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Assume a 68K processor is using 4-stage pipelines as the followings.
IA
DC
OA
EX
Instruction
Decoding
Operand
Exеcution
ALU
Instruction
Instruction
Data
Memory
Register
Memory
Data Memory
Data Register
Reorder the following instructions to speed up the execution time. Indicate how many number of
clock cycles can be saved with this reordering?
MOVE.W #$128, D2
DIVU #$16, D2
MOVE.W D2, (A4)
LEA (A5), A3
MOVE.W #$14, (A3)
ADD.W (A4)+, D6
MOVE.W D6, D2
Transcribed Image Text:Assume a 68K processor is using 4-stage pipelines as the followings. IA DC OA EX Instruction Decoding Operand Exеcution ALU Instruction Instruction Data Memory Register Memory Data Memory Data Register Reorder the following instructions to speed up the execution time. Indicate how many number of clock cycles can be saved with this reordering? MOVE.W #$128, D2 DIVU #$16, D2 MOVE.W D2, (A4) LEA (A5), A3 MOVE.W #$14, (A3) ADD.W (A4)+, D6 MOVE.W D6, D2
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