Question4: An article in the AT&T Technical Journal (March/April 1986, Vol. 65. pp. 39-50) describes the application of two-level factorial designs to integrated circuit manufacturing. A basic processing step is to grow an epitaxial layer on polished sili- con wafers. The wafers mounted on a susceptor are positioned inside a bell jar, and chemical vapors are introduced. The sus- ceptor is rotated, and heat is applied until the epitaxial layer is thick enough. An experiment was run using two factors: arsenic flow rate (A) and deposition time (B). Four replicates were run, and the epitaxial layer thickness was measured (μm). The data are shown in Table P6.1. ■ TABLE P6.1 The 2¹ Design for Problem 6.16 B I 14.037 13.880 14.821 11 Replicate 16.165 13.860 14.757 14.921 111 13.972 14032 14.843 14.415 IV 13.907 13914 14.878 14.932 A B Factor Levels Low (-) 559 Short (10 min) (d) Analyze the residuals. Are there any residuals that should cause concern? (e) Discuss how you might deal with the potential outlier found in part (d). High (+) 599 Long (15 min) Determine the response variable, factors (kind of factor), level, number of treatments, number of replications, number of experiments. (b) Determine the type of design experiment. (c) Write the model of design experiment.

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Question4: An article in the AT&T Technical Journal (March/April
1986, Vol. 65, pp. 39-50) describes the application of two-level
factorial designs to integrated circuit manufacturing. A basic
processing step is to grow an epitaxial layer on polished sili-
con wafers. The wafers mounted on a susceptor are positioned
inside a bell jar, and chemical vapors are introduced. The sus-
ceptor is rotated, and heat is applied until the epitaxial layer
is thick enough. An experiment was run using two factors:
arsenic flow rate (A) and deposition time (B). Four replicates
were run, and the epitaxial layer thickness was measured (μm).
The data are shown in Table P6.1.
TABLE P6.1
The 2¹ Design for Problem 6.16
A
B
+
+
I
14.037
13.880
14.821
14.888
t
11
Replicate
16.165
13.860
14.757
14.921
III
13.972
14.032
14.843
14.415
IV
13.907
13914
14.878
14.932
A
8
Factor Levels
Low (-)
55%
Short
(10 min)
(d) Analyze the residuals. Are there any residuals that
should cause concern?
(e) Discuss how you might deal with the potential outlier
found in part (d).
High (+)
59%
Long
(15 min)
Determine the response variable, factors (kind of factor), level, number of treatments,
number of replications, number of experiments.
(b) Determine the type of design experiment.
(c) Write the model of design experiment.
Transcribed Image Text:Question4: An article in the AT&T Technical Journal (March/April 1986, Vol. 65, pp. 39-50) describes the application of two-level factorial designs to integrated circuit manufacturing. A basic processing step is to grow an epitaxial layer on polished sili- con wafers. The wafers mounted on a susceptor are positioned inside a bell jar, and chemical vapors are introduced. The sus- ceptor is rotated, and heat is applied until the epitaxial layer is thick enough. An experiment was run using two factors: arsenic flow rate (A) and deposition time (B). Four replicates were run, and the epitaxial layer thickness was measured (μm). The data are shown in Table P6.1. TABLE P6.1 The 2¹ Design for Problem 6.16 A B + + I 14.037 13.880 14.821 14.888 t 11 Replicate 16.165 13.860 14.757 14.921 III 13.972 14.032 14.843 14.415 IV 13.907 13914 14.878 14.932 A 8 Factor Levels Low (-) 55% Short (10 min) (d) Analyze the residuals. Are there any residuals that should cause concern? (e) Discuss how you might deal with the potential outlier found in part (d). High (+) 59% Long (15 min) Determine the response variable, factors (kind of factor), level, number of treatments, number of replications, number of experiments. (b) Determine the type of design experiment. (c) Write the model of design experiment.
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