Question 3) For the CPU architecture given in slide 17 of lecture-3 notes, find the instruction binary encodings for the program shown below and fill in the instruction memory table. You must use 3 instructions at most. Assume every address in instruction memory stores a single 16-bit instruction and the program is stored in instruction memory starting from address 0. Also, assume all CPU registers are 8-bits wide and all initially contain OxFF value. In the program below, assume variable "a" is mapped to RO register and R1 is used as a temporary register for calculations. For deriving the encoding for each instruction, show the values of individual control word bits and explain why those bits are selected as such. unsigned int a = 5;//const 5 is an immediate value that is stored into a which is mapped to RO a = a*5; //Multiply a by 5 and store the result back to a in RO

Systems Architecture
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ISBN:9781305080195
Author:Stephen D. Burd
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Chapter4: Processor Technology And Architecture
Section: Chapter Questions
Problem 2PE: If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the...
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Question 3) For the CPU architecture given in slide 17 of lecture-3 notes, find the instruction binary
encodings for the program shown below and fill in the instruction memory table. You must use 3
instructions at most.
Assume every address in instruction memory stores a single 16-bit instruction and the program is stored in
instruction memory starting from address 0. Also, assume all CPU registers are 8-bits wide and all initially
contain OxFF value. In the program below, assume variable "a" is mapped to RO register and R1 is used as
a temporary register for calculations.
For deriving the encoding for each instruction, show the values of individual control word bits and explain
why those bits are selected as such.
unsigned int a = 5;//const 5 is an immediate value that is stored into a which is mapped to RO
a = a*5;
//Multiply a by 5 and store the result back to a in RO
Transcribed Image Text:Question 3) For the CPU architecture given in slide 17 of lecture-3 notes, find the instruction binary encodings for the program shown below and fill in the instruction memory table. You must use 3 instructions at most. Assume every address in instruction memory stores a single 16-bit instruction and the program is stored in instruction memory starting from address 0. Also, assume all CPU registers are 8-bits wide and all initially contain OxFF value. In the program below, assume variable "a" is mapped to RO register and R1 is used as a temporary register for calculations. For deriving the encoding for each instruction, show the values of individual control word bits and explain why those bits are selected as such. unsigned int a = 5;//const 5 is an immediate value that is stored into a which is mapped to RO a = a*5; //Multiply a by 5 and store the result back to a in RO
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