Question 19Consider two different machines with two different instruction sets, both of which have a clock rate of 800 MHz. The following measurements are recorded on the two machines running a given set of benchmark programs.Instruction TypeMachine AArithmetic and logicLoad and storeBranchOthersMachine BArithmetic and logicLoad and storeBranchOthersWhat is the average CPI for Machine A?O 3.33O None of themO 2.22O 1.11Instruction Count (millions)O 4.44842410824Cycles perInstruction1343243 Question 18Consider two different machines with two different instruction sets, both of which have a clock rate of 800 MHz. The following measurements are recorded on the two machines running a given set of benchmark programs.Instruction TypeMachine AArithmetic and logic.Load and storeBranchOthersMachine BArithmetic and logicLoad and storeBranchOthersWhat is the average CPI for machine B?O 4.44O None of themO 2.22O 3.33Instruction Count (millions)O 1.11842410824Cycles perInstruction13431243

An instruction set which it is the code that the computer processor (CPU) can understand. The…

Question 19 Consider two different machines with two different instruction sets, both of which have a clock rate of 800 MHz. The following measurements are recorded on the two machines running a given set of benchmark programs. Instruction Type Machine A Arithmetic and logic Load and store Branch Others Machine B Arithmetic and logic Load and store Branch Others What is the average CPI for Machine A? O 3.33 O None of them O 2.22 O 1.11 Instruction Count (millions) O 4.44 8 4 2 4 10 8 2 4 Cycles per Instruction 1 3 4 3 1 2 4 3

Question 19 Consider two different machines with two different instruction sets, both of which have a clock rate of 800 MHz. The following measurements are recorded on the two machines running a given set of benchmark programs. Instruction Type Machine A Arithmetic and logic Load and store Branch Others Machine B Arithmetic and logic Load and store Branch Others What is the average CPI for Machine A? O 3.33 O None of them O 2.22 O 1.11 Instruction Count (millions) O 4.44 8 4 2 4 10 8 2 4 Cycles per Instruction 1 3 4 3 1 2 4 3

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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Consider two different implementations, 1 and 12, of the same instruction set. There are three classes of instructions (A, B, and C) in the instruction set. I1 has a clock rate of 6GHZ, and 12 has a clock rate of 3GHZ. The average number of cycles for each instruction class on 1 and 12 is given in the following table: CPI on 12 C1 Usage C2 Usage Class CPI on 11 C3 Usage A 2. 40% 40% 50% 40% 20% 25% 5 20% 40% 25% The table also contains a summary of average proportion of instruction classes generated by three different compilers. C1 is a compiler produced by the makers of 1, C2 is produced by the makers of 12, and the other compiler is a third-party product. Assume that each compiler uses the same number of instructions for a given program but that the instruction mix is as described in the table. Using C1 on both 1 and 12, how much faster can the makers of 1 claim 1 is compared to 12? Using C2, how much faster can the makers of 12 claim that 12 is compared to 1?
two different compilers are being tested on the same program for a 3.6GHz machine with three different classes of instructions: Class A,B and C, which require 1, 2 and 3 cycles respectively. the instruction count produced by the first compiler is 4 billion Class A instuctions, 1 billion class B and 4 billion class C instructions. the second compiler produces 8 billion Class A instructions, 2 billion Class B and 3 billion class C instructions. which compiler produces a higher MIPS? which compiler produces a better execution time?
A program is profiled on a CPU: 20% of all instructions are arithmetic, 40% are load, 20% are store, 20% are conditional branches. On this CPU, loads take 4 cycles, stores 1 cycle, ALU instructions 2 cycle, and branches 3 cycles. Compute the CPI for each instruction and the average CPI for that program on that CPU: Compute the CPI for each instruction (GIVE ANSWERS WITH 2 DECIMAL DIGITS: CPI for loads is CPI for stores is CPI for ALU is CPI for branches is Average CPI is
H.W.: Consider a hypothetical machine with two steps instruction cycle: fetch cycle and execute cycle. The characteristics of the machine is given in Figure 8 with the following explanation: The processor contains a single data register, called an accumulator (AC). • Both instructions and data are 8 bits long. • The memory is organized using 8-bit words. • The instruction format provides 2 bits for the opcode, and up to 26 = 64 words of memory can be directly addressed. Opcode Address (a) Instruction format Magnitude (b) Integer format Program counter (PC)= Address of instruction Instruction register (IR)- Instruction being executed Accumulator (AC) Temporary storage (c) Internal CPU registers -Load AC from memory Store AC to memory - Add to AC from memory (d) Partial list of opcodes Figure 8 Characteristics of a Hypothetical Machine Figure 9 illustrates a partial program execution, showing the relevant portions of memory and processor registers after the first instruction, 64H has…
Given an instruction sequence with instructions in classes A, B, and C as the table below: Instruction Class A B C |CPI Instruction Count|10|40|10| 2 1 3 Total number of instructions in this sequence = Number of clock cycles from instruction class A = Number of clock cycles from instruction class B = Number of clock cycles from instruction class C = Total number of clock cycles = Average CPI for this instruction sequence = (Answer with a float the decimal point, e.g. 4.5)
1. We wish to compare the performance of two different machines: M1 and M2. The following measurements have been made on these machines: Program Time on M1 Time on M2 1 10 seconds 5 seconds 2 3 seconds 4 seconds Which machine is faster for each program, and by how much? 2. For M1 and M2 of problem 1, the following additional measurements are made:. Find the instruction execution rate (instructions per second) for each machine when running program 1. Program Instructions executed on M1 Instructions executed on M2 1 200 x 106 160 x 106 3. For M1 and M2 of problem 1, if the clock rates are 200 MHz and 300 MHz, respectively, find the CPI for program 1 on both machines using the data provided in problems 1 and 2. 4. You are going to enhance a machine, and there are two possible improvements: either make multiply instructions run four times faster than before or make memory access instructions run two times faster than before. You…
Suppose we have two implementations of the same instruction set architecture. Computer A has a clock cycle time of 210 ps and a CPI of 2.2 for some programs, and computer B has a clock cycle time of 460 ps and a CPI of 1.3 for the same program. Which computer is faster for this program and by how much? Please and thank you
one Mil Q#1: Consider the instruction: add $2, $1, $3 What registers will be written and what registers will be read to execute this instruction? Registers to be written Registers to be read Q#2: Since we only support the add instruction, we don't care much for opcodes and funct codes and shamts. Therefore, suppose our programs are given to the processor as three inputs RD, RS, and RT. Each instruction executes within 1 clock periods Translate the following program to the RW, RS, RT inputs (in binary). clock period RD RS 1 2 3 4 RS RT Program add $2, $1, $3 add $0, $0, $1 add $1, $2, $2 add $1, $1, $1 Q#3: Design the single-cycle cessor datapath (only ID, EX and WB stages) using the mong different components. following datapath components.rly s the number of bits to be transferred in each data line and data bus connectio RD cik Registers RA RB RW BusA RegWrite Bus8 Bus W ALU zero ALU result overflow RT ALUOP
Question 20 Consider two different machines with two different instruction sets, both of which have a clock rate of 800 MHz. The following measurements are recorded on the two machines running a given set of benchmark programs. Instruction Type Machine A Arithmetic and logic Load and store Branch Others Machine B Arithmetic and logic Load and store Branch Others O 50 ms O 70 ms O 55.2 ms O 60 ms Instruction Count (millions) O None of them 8 4 2 4 10 8 2 4 Cycles per Instruction 1 3 4 With machine A, how long would it take to execute the program? 3 1 2 4 3
Determine the effective CPI, MIPS rate, and execution time for this program. Consider two different machines, with two different instruction sets, both of which have a clock rate of 200 MHz. The following measurements are recorded on the two machines running a given set of benchmark programs: Instruction Count (millions) Instruction Type Machine A Arithmetic and logic Load and store Branch Others Machine A Arithmetic and logic Load and store Branch Others 8424 10 9824 Cycles per Instruction 1343 1243 4 a. Determine the effective CPI, MIPS rate, and execution time for each machine. b. Comment on the results.
Consider the execution of a program that results in the execution of 8 million instructions on a 400-MHz processor. The program consists of four major types of instructions. The instruction mix and the CPI for each instruction type are given below. What is the program execution time in the second? Instruction Type Arithmetic and logic Load/store with cache hit Branch Floating-point arithmetic operation Execution Time: sec CPI 3 4 3 9 Instruction Mix (%) 60 20 12 8
Suppose that we are developing a new version of the AMD Barcelona proces- sor with a 4 GHz clock rate. We have added some additional instructions to the instruction set in such a way that the number of instructions has been reduced by 15% from the values shown for each benchmark in Exercise 1.12. The execution times obtained are shown in the following table. a. Name Execution Time (seconds) Reference Time (seconds) bzip2 700 9650 SPECratio 13.7 1.13.2 [10] In general, these CPI values are larger than those obtained in previous exercises for the same benchmarks. This is due mainly to the clock rate used in both cases, 3 GHz and 4 GHz. Determine whether the increase in the CPI is similar to that of the clock rate. If they are dissimilar, why?