QI 126 (a) What is the largest address value? (b) List the ports of the memory and tell me how many bits each of them are. (c) Every memory has an embedded Mux N to I in it. What is N in our case? (d) Every menory has an embedded Decoder I to J in it What is I and J in our case? Should the Decoder have an Enable input or Not, and why? (e) If I implented this memory with flops, how many would I need? () Implementing a memory directly with transistors instead of flops and gates improves which of the following: Area, Power, Access Time fgi lf we want to modify this memory to read-only, which pin(s) can we eliminate? EI have a synchronous single-port read write memory. Its total size 750 B. Its wordsize is

QI 126 (a) What is the largest address value? (b) List the ports of the memory and tell me how many bits each of them are. (c) Every memory has an embedded Mux N to I in it. What is N in our case? (d) Every menory has an embedded Decoder I to J in it What is I and J in our case? Should the Decoder have an Enable input or Not, and why? (e) If I implented this memory with flops, how many would I need? () Implementing a memory directly with transistors instead of flops and gates improves which of the following: Area, Power, Access Time fgi lf we want to modify this memory to read-only, which pin(s) can we eliminate? EI have a synchronous single-port read write memory. Its total size 750 B. Its wordsize is

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

See similar textbooks

Similar questions

A computer has 64 MB (megabytes) of memory. Each word is 4 bytes. How many bits are needed to address eath single word in memory? P5-1. Р5-2. How many bytes of memory are needed to store a full screen of data if the screen is made of 24 lines with 80 characters in each line? The system uses ASCII code, with each ASCII character stored as a byte.
By assuming 32 is a two digitnumber, consider memory storage of a 64-bit word stored at memory word 32 ina byte-addressable memory.(a) What is the byte address of memory word 32?(b) What are the byte addresses that memory word 32 spans?(c) Draw the number 0xF1234567890ABCDE stored at word 32 in both big-endianand little-endian machines. Clearly label the byte address corresponding to eachdata byte value.
Suppose the RAM for a certain computer has 4M words, where each word is 16 bits long. What is the capacity of this memory expressed in bytes? If this RAM is byte addressable, how many bits must an address contain? If this RAM is word addressable, how many bits must an address contain?
a) A paging system with 512 pages of logical address space, a page size of 28 and number of frames is 1024. Answer the following questions (in bytes or in form 2") and show all your work. i. ii. iii. iv. V. vi. vii. Page number 1 2 3 4 5 6 7 Frame number 100 50 180 10 79 644 21 301 What is the total size of the logical address space? [2] What is the total size of the physical address space? [2] What is the frame size of the physical memory? [1] How many frames of the physical memory in a number of the form 2”? [1] How many number of entry in the page table? [1] What is the number of bit for the page number in logical memory address and frame number in physical memory address? [2] What is the logical address (in decimal) given a physical address of 1010000100102. [2]
Consider the following hexadecimal readout: 000000 8A00 8E00 CFA1 48BF 7900 3202 9015 AD34 000010 0218 6D30 028D 3402 AD35 0288 3102 8D35 000020 0E30 0290 DAEE 3102 4C00 0200 0040 004B Refer to the first byte of memory shown above, address 000000. Assume that this byte is used to store an 8-bit unsigned integer. What is the decimal value stored in this byte? Group of answer choices 138 -27 22,842 66
Suppose that a magnetic disk has an average seek time of 4 ms, a rotation rate of 5400 RPM, a transfer rate of 50 MB/second, a sector size of 512 bytes, and controller overhead of 2 ms. What is the average amount of time to read a single sector?
For a computer with 56-bit physical addresses and a 8-way set associative cache of 64 KB where each cache line has the capacity of holding 32 words. Assume the word size is 3 and the architecture is byte-addressable. Answer the questions below: a.How many bits are needed for tag, index, word offset, and byte offs. Show your derivations and assumptions. b.What are the start and end physical addresses, in hex as discussed in class, for cache line 300? Cache line count starts from 0. c.What is the total size, in KB, of this cache? d.What is the tag value, in hex, of address 0xABCDEF98765432?
4. bus throughput Consider a serial bus (1 bit wide) that runs at 2GHZ, usingalternate cycles for control signals and the other half of the cycles for data. What is the throughput of the busin bytes/second? Assume you wantto attach a video camera using this bus. The camera generates 60 frames per second, with each frame containing 1 Million pixels, each pixel 4 bytes in size. Would this work? Answer one of the below: a) If not, what compression factor would the camera need to achieve to be supported? A compression factor describes how mu ch smaller the data is when compared to un- compressed data. b) If yes, how many cameras could be connected?
Suppose you have a byte-addressable computer using fully associative mapping with 16-bit main memory addresses and 32 blocks of cache. If each block contains 16 bytes, determine the size of the tag field, and show how you arrived at the result.
4. e. How many address pins are needed to address 64K SRAM? f. How many address pins are needed to address 256K DRAM? g. What is the range of addresses accessible by the chip shown below? D7 DO A0 64K x 8 A 16 A17 Do A 15 A18- CS A19- OE WR MEMR. |МEMW h. What signals are provided by the CPU in order to write a byte of data into memory?
14 Assume that the base address of 8255-PPI chip is OC00H and the address of port C of the chip is OC04H, which address lines are generating the selection line A1 A0? * Selection lines A1 A0 from address lines A2 A1 O None Selection lines A1 A0 from address lines A1 A0 Selection lines A1 A0 from address lines A3 A2 O Selection lines A1 A0 from address lines A2 A0
Show how the decimal value 2019111310 would be stored by byte-addressable machines with 32-bit words, using little endian format and then big endian format. Assume the value starts at address 201916. Draw a diagram of memory and place the appropriate values in the correct (and labeled) memory locations.