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Q6) Choose the correct answer: 1- LEA DI, [BX+50H] Suppose BX=1E3H, DI=3034H and [BX+50]=58H. The DI content after executing the above instruction is ---- A- 0233H. B- 0058H. C- 01E3H. D- 3034H.

Q6) Choose the correct answer: 1- LEA DI, [BX+50H] Suppose BX=1E3H, DI=3034H and [BX+50]=58H. The DI content after executing the above instruction is ---- A- 0233H. B- 0058H. C- 01E3H. D- 3034H.

Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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Q6) Choose the correct answer: 1- LEA DI, [BX+5OH] Suppose BX=1E3H, DI=3034H and [BX+50)=58H. The DI content after executing the above instruction is --- A- 0233H. B- 0058H. C- 01E3H. D- 3034H. 2- OR CL, 14H Sets bits ------ and ---- of CL register. A- 1,4 B- 0, 3 C- 2, 3 D- 2, 4 3- The ------- activates extemal data bus buffers of the 8086/8088 microprocessor. A- ALE B- DEN C- DT/R D- HOLD 4- If READY is a logic 1 a wait state A- inserted between TI and T2. B- inserted between T2 and T3. C- inserted between T3 and T4. D- never inserted. 5- Instruction queue in 8086 is a instruction to be fetched while the MP is executing the current instruction. A- 4 byte. B- 6 byte. C- 8 byte. D- 12 byte. first in first out buffer allows next 6- Each interrupt vector is - bytes long (in the real mode) and contains the starting address of the interrupt service procedure. A-2 B- 4 C- 6 D- 8 7- To generate the physical address, the values of segment register is shifted to the right four bit positions. (True or False?)
Transcribed Image Text:Q6) Choose the correct answer: 1- LEA DI, [BX+5OH] Suppose BX=1E3H, DI=3034H and [BX+50)=58H. The DI content after executing the above instruction is --- A- 0233H. B- 0058H. C- 01E3H. D- 3034H. 2- OR CL, 14H Sets bits ------ and ---- of CL register. A- 1,4 B- 0, 3 C- 2, 3 D- 2, 4 3- The ------- activates extemal data bus buffers of the 8086/8088 microprocessor. A- ALE B- DEN C- DT/R D- HOLD 4- If READY is a logic 1 a wait state A- inserted between TI and T2. B- inserted between T2 and T3. C- inserted between T3 and T4. D- never inserted. 5- Instruction queue in 8086 is a instruction to be fetched while the MP is executing the current instruction. A- 4 byte. B- 6 byte. C- 8 byte. D- 12 byte. first in first out buffer allows next 6- Each interrupt vector is - bytes long (in the real mode) and contains the starting address of the interrupt service procedure. A-2 B- 4 C- 6 D- 8 7- To generate the physical address, the values of segment register is shifted to the right four bit positions. (True or False?)
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