Q6) A hard real time task of 1000 instructions (each instruction is of 1- byte) is running by a processor of 12 CPI (due to cache), with cache, and memory cycle (read or write in the main memory) of 10 processor clocks. The deadline of the task is 1 nano sec. 25% of the instructions requested memory access. Statistical observations show that 90% of the memory accesses are for read (from cache) whereas only 10%

Q6) A hard real time task of 1000 instructions (each instruction is of 1- byte) is running by a processor of 12 CPI (due to cache), with cache, and memory cycle (read or write in the main memory) of 10 processor clocks. The deadline of the task is 1 nano sec. 25% of the instructions requested memory access. Statistical observations show that 90% of the memory accesses are for read (from cache) whereas only 10%

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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