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Q3/ design logic circuit encoder for addition, subtraction, multiplication, and division.

Q3/ design logic circuit encoder for addition, subtraction, multiplication, and division.

Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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Q3/ design logic circuit encoder for addition, subtraction, multiplication, and division.
Transcribed Image Text:Q3/ design logic circuit encoder for addition, subtraction, multiplication, and division.
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Step 1

An Encoder is a combinational circuit that plays out the converse activity of Decoder.It has limit of 2^n info lines and 'n' yield lines, thus it encodes the data from 2^n contributions to a n-bit code. It will create a twofold code identical to the info, which is dynamic High. Thusly, the encoder encodes 2^n information lines with 'n' bits. 

Computer Engineering homework question answer, step 1, image 1

Encoder – 

The 4 to 2 Encoder comprises of four information sources Y3, Y2, Y1 and Y0 and two yields A1 and A0. Whenever, just one of these 4 information sources can be '1' to get the individual twofold code at the yield. The figure underneath shows the rationale image of 4 to 2 encoder : 

Computer Engineering homework question answer, step 1, image 2

the truth table of 4 to 2 encoder:

Computer Engineering homework question answer, step 1, image 3

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