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Q3// 1-Use Two Half adder and only one NOR gate to design magnitude comparator circuit. This circuit has two inputs A (2-bit) and B (2-bit) and one output F (1-bit). The output F will be high when the two inputs are equal (A-B). 2- Design a combinational logic circuit that Subtractor (Bs B, B, B, B, B, B2 B,) from (A A As As A4 Ay A2 A1) using two 4-bit binary adder and external gates.

Q3// 1-Use Two Half adder and only one NOR gate to design magnitude comparator circuit. This circuit has two inputs A (2-bit) and B (2-bit) and one output F (1-bit). The output F will be high when the two inputs are equal (A-B). 2- Design a combinational logic circuit that Subtractor (Bs B, B, B, B, B, B2 B,) from (A A As As A4 Ay A2 A1) using two 4-bit binary adder and external gates.

Database System Concepts
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
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Q3// 1-Use Two Half adder and only one NOR gate to design magnitude comparator circuit. This circuit has two inputs A (2-bit) and B (2-bit) and one output F (1-bit). The output F will be high when the two inputs are equal (A-B). 2- Design a combinational logic circuit that Subtractor (B, B, B, B, B, B, B2 B,) from (A, Ar A, As A4 As A2 A)) using two 4-bit binary adder and external gates. 3- Design a combinational logic circuit that multiplied four-bit (A. A3 A2 A1) by two-bit (B2 B) using 4-bit binary adder and external gates.
Transcribed Image Text:Q3// 1-Use Two Half adder and only one NOR gate to design magnitude comparator circuit. This circuit has two inputs A (2-bit) and B (2-bit) and one output F (1-bit). The output F will be high when the two inputs are equal (A-B). 2- Design a combinational logic circuit that Subtractor (B, B, B, B, B, B, B2 B,) from (A, Ar A, As A4 As A2 A)) using two 4-bit binary adder and external gates. 3- Design a combinational logic circuit that multiplied four-bit (A. A3 A2 A1) by two-bit (B2 B) using 4-bit binary adder and external gates.
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