Q1/Draw block diagram (logic circuit gate) from the function shown below: F = XY + X Y+ Yz-

Introductory Circuit Analysis (13th Edition)
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Ministry of Higher Education &
Subject Digital System
Stage. 2 year
Date: 18/3/ 2021
Scientific Research
Middle Technical University
Electrical Engineering Technical College
Department of Control & Automation
Techniques Engineering
Lecturer: Akhal Omraun
Time: One hour and a half
First Term
2020/2021
Note: Answer two questions only.
Q1/Draw block diagram (logic circuit gate) from the function shown
below:
F = XY + X Y+ Yz-
Q2/Convert from Decimal to Binary (choose 2 only)
1- (87)1
2- (156):0
3- (179)10
Q3/ Find the summation between 3-bit binary full adder, draw Block
diagram.
A=101 + B= 001
GOOD LUCK
Lecturer
Akbal O. Salman
Head of Department
Dr. Ayad Qassim
Transcribed Image Text:Ministry of Higher Education & Subject Digital System Stage. 2 year Date: 18/3/ 2021 Scientific Research Middle Technical University Electrical Engineering Technical College Department of Control & Automation Techniques Engineering Lecturer: Akhal Omraun Time: One hour and a half First Term 2020/2021 Note: Answer two questions only. Q1/Draw block diagram (logic circuit gate) from the function shown below: F = XY + X Y+ Yz- Q2/Convert from Decimal to Binary (choose 2 only) 1- (87)1 2- (156):0 3- (179)10 Q3/ Find the summation between 3-bit binary full adder, draw Block diagram. A=101 + B= 001 GOOD LUCK Lecturer Akbal O. Salman Head of Department Dr. Ayad Qassim
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