Q1. Figure 3.1 shows an RLC circuit at t >0 s. Assume a current source of 5A is applied to the circuit. The inductor has an initial current, i, (0) = 20 mA and the initial capacitor voltage, vc (0) = 10 V. Is iz(t) | L + vc(t) C R Figure Q1 (a) Design your circuit to obtain an overdamped, critically damped, and underdamped response. For the design, choose undamped frequency, o in the 700 rad/s. (b) Find the expression of ve(t) and i₁(t) for t≥0s for each of your circuit design in part Q1(a). Show all your calculations. (c) Simulate the circuit designed in part Q1(a) and plot all the responses of vc(t) and i(t) for t≥ 0 s. You should have: (i)individual response plot and (ii) combination of all response plot on a single graph. (d) Analyze the responses from part Q1(c) that will give you the shortest time on reaching 80% of the final value of ve(t). Give comment and conclusion.

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Electric Circuit 2

Q1.
Figure 3.1 shows an RLC circuit at t> 0 s. Assume a current source of 5A is applied to the
circuit. The inductor has an initial current, i, (0) = 20 mA and the initial capacitor voltage,
vc (0) = 10 V.
Is
iz(t) |
L
+
ve(t)
M
R
Figure Q1
(a) Design your circuit to obtain an overdamped, critically damped, and underdamped
response. For the design, choose undamped frequency, w in the 700 rad/s.
(b)
Find the expression of ve(t) and i₁(t) for t≥0s for each of your circuit design
in part Q1(a). Show all your calculations.
(c)
Simulate the circuit designed in part Q1(a) and plot all the responses of ve(t) and
i(t) for t≥ 0 s. You should have: (i)individual response plot and (ii) combination
of all response plot on a single graph.
(d)
Analyze the responses from part Q1(c) that will give you the shortest time on reaching
80% of the final value of ve(t). Give comment and conclusion.
Transcribed Image Text:Q1. Figure 3.1 shows an RLC circuit at t> 0 s. Assume a current source of 5A is applied to the circuit. The inductor has an initial current, i, (0) = 20 mA and the initial capacitor voltage, vc (0) = 10 V. Is iz(t) | L + ve(t) M R Figure Q1 (a) Design your circuit to obtain an overdamped, critically damped, and underdamped response. For the design, choose undamped frequency, w in the 700 rad/s. (b) Find the expression of ve(t) and i₁(t) for t≥0s for each of your circuit design in part Q1(a). Show all your calculations. (c) Simulate the circuit designed in part Q1(a) and plot all the responses of ve(t) and i(t) for t≥ 0 s. You should have: (i)individual response plot and (ii) combination of all response plot on a single graph. (d) Analyze the responses from part Q1(c) that will give you the shortest time on reaching 80% of the final value of ve(t). Give comment and conclusion.
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