Q1. Design three versions of the combinational circuit those input is a 4-bit 1IPage number and whose output is the 2' complement of the input number. for each of the following cases. (a) The circuit is a simplified two-level circuit. plus, inverters as needed for the input variables (b) The circuit is made up of four identical two input, two output cells. One for each bit. The cells are connected in cascade, with lines, similar to a carry between them. The value applied to the right most carry bit is 0, (c) The circuit is redesigned with carry look ahead-like logic in order to speed up the circuit in part (b) for use in larger circuits with 4n input bits.

Question 3: Design a one-input, one-output serial 2's complementor. The circuit accepts a string of bits from the input and generates the 2's complement at the output. The circuit can be reset asynchronously to start and end the operation.

-Design a traffic light controller in which the traffic on an intersection crossing is controlled by a digital circuit using JK Flip-Flops in a synchronous counter. Use traffic signals with red, green and yellow lights on each side of crossing. The lights operate such that red will be on 30 sec. At, the same time, the green light of an adjacent road lights 25 sec followed by the yellow light will be on 5 sec momentarily before the red light goes off. There is a ready timer creating clock pulse of 5 sec per cycle. Design the system by doing the following steps:a) Using block diagram show the plan of circuit and mention the number of JK Flip-Flops that you need.b) Write the truth table of the synchronous counter you need for this design.c) Make the required K-maps and write the Boolean algebraic functions for each J and K inputs using the K-Maps.d) Draw the circuit for this traffic light controller.