Q1: Draw the timing diagram for an 8086 microprocessor in maximum mode. Suppose this processor has a passive state from TO to T3, and T7 to T8 for access code, then the following code has been applied to the system. Note: do not repeat the process in the timing diagram. (5 Marks) org 100h LEA SI, DAT LEA DI ADR MOU CX, 03H # 19-T1 # T1 T2 # T2 T3 55 L: IN AL, ? B2 149 1 HLT # T3 T4 MOU [DI], AL # MOU AL, [SI] OUT 7, AL LOOP L T4-T5 # T5-T6 # T6-T7 # T7 T8 # 18-19 DAT DB 06H, 05H, 03H 12 ADR DW 200H, 600H
Q1: Draw the timing diagram for an 8086 microprocessor in maximum mode. Suppose this processor has a passive state from TO to T3, and T7 to T8 for access code, then the following code has been applied to the system. Note: do not repeat the process in the timing diagram. (5 Marks) org 100h LEA SI, DAT LEA DI ADR MOU CX, 03H # 19-T1 # T1 T2 # T2 T3 55 L: IN AL, ? B2 149 1 HLT # T3 T4 MOU [DI], AL # MOU AL, [SI] OUT 7, AL LOOP L T4-T5 # T5-T6 # T6-T7 # T7 T8 # 18-19 DAT DB 06H, 05H, 03H 12 ADR DW 200H, 600H
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
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![Q1: Draw the timing diagram for an 8086 microprocessor in maximum mode.
Suppose this processor has a passive state from TO to T3, and T7 to T8 for access
code, then the following code has been applied to the system. Note: do not repeat
the process in the timing diagram.
(5 Marks)
org 100h
LEA SI, DAT
LEA DI ADR
MOU CX, 03H
# 19-T1
# T1 T2
# T2 T3
55
L: IN AL, ?
B2
149
1 HLT
# T3 T4
MOU [DI], AL
#
MOU AL, [SI]
OUT 7, AL
LOOP L
T4-T5
# T5-T6
# T6-T7
# T7 T8
# 18-19
DAT DB 06H, 05H, 03H
12 ADR DW 200H, 600H](/v2/_next/image?url=https%3A%2F%2Fcontent.bartleby.com%2Fqna-images%2Fquestion%2F14cd6867-7ca8-45e4-b2b6-55ca77f46729%2F4f52383d-9b33-4d0e-a0f2-03b36ba0949e%2Fn03dqh_processed.jpeg&w=3840&q=75)
Transcribed Image Text:Q1: Draw the timing diagram for an 8086 microprocessor in maximum mode.
Suppose this processor has a passive state from TO to T3, and T7 to T8 for access
code, then the following code has been applied to the system. Note: do not repeat
the process in the timing diagram.
(5 Marks)
org 100h
LEA SI, DAT
LEA DI ADR
MOU CX, 03H
# 19-T1
# T1 T2
# T2 T3
55
L: IN AL, ?
B2
149
1 HLT
# T3 T4
MOU [DI], AL
#
MOU AL, [SI]
OUT 7, AL
LOOP L
T4-T5
# T5-T6
# T6-T7
# T7 T8
# 18-19
DAT DB 06H, 05H, 03H
12 ADR DW 200H, 600H
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