Q 1. Determine the output voltage of the Digital-to-Analog Converter (DAC) in Figure 1(a) and plot it in Figure 1(c). The sequence of the four digit binary codes represented by the waveforms in Figure 1(b) are applied to the inputs. A high level is a binary 1and a low level is a binary 0. The least significant binary digit is Do. Do o D₁ 0- D₂ 0- 200 ΚΩ www 100 ΚΩ www 50 ΚΩ www 25 ΚΩ D3 0 M 0 -0.25 -0.50 -0.75 -1.00 -1.25 -1.50 -1.75 -2.00 -2.25 -2.50 -2.75 -3.00 -3.25 -3.50 -3.75 0000 Vout (V) (a) 1000 R₁ 10 ΚΩ 0010 0011 0100 0101 0110 -O Vout ILIO +5 V 0 +5 V D₁ 0 +5 V 0 +5 V 0 Do D₂ D3 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 거지로 (c) Figure 1 I TI 1000 1001 1010 1011 1100 1101 1110 1111 (b) Binary input

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Q 1. Determine the output voltage of the Digital-to-Analog Converter (DAC) in Figure 1(a)
and plot it in Figure 1(c). The sequence of the four digit binary codes represented by
the waveforms in Figure 1(b) are applied to the inputs. A high level is a binary 1and
a low level is a binary 0. The least significant binary digit is Do.
Do o
D₁ 0-
200 ΚΩ
www
D₂ 0
100 ΚΩ
www
50 ΚΩ
www
25 ΚΩ
D3 0 M
0
-0.25
-0.50
-0.75
-1.00
-1.25
-1.50
-1.75
-2.00
-2.25
-2.50
-2.75
-3.00
-3.25
-3.50
-3.75
(a)
Vout (V)
R₁
10 ΚΩ
o Vout
+5 V
Do
0
+5 V
D₁ 0
+5 V
0
+5 V
0
D₂
D3
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
non
(c)
Figure 1
I
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
|||||
(b)
Binary input
Transcribed Image Text:Q 1. Determine the output voltage of the Digital-to-Analog Converter (DAC) in Figure 1(a) and plot it in Figure 1(c). The sequence of the four digit binary codes represented by the waveforms in Figure 1(b) are applied to the inputs. A high level is a binary 1and a low level is a binary 0. The least significant binary digit is Do. Do o D₁ 0- 200 ΚΩ www D₂ 0 100 ΚΩ www 50 ΚΩ www 25 ΚΩ D3 0 M 0 -0.25 -0.50 -0.75 -1.00 -1.25 -1.50 -1.75 -2.00 -2.25 -2.50 -2.75 -3.00 -3.25 -3.50 -3.75 (a) Vout (V) R₁ 10 ΚΩ o Vout +5 V Do 0 +5 V D₁ 0 +5 V 0 +5 V 0 D₂ D3 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 non (c) Figure 1 I 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 ||||| (b) Binary input
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