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processor ing a cond is known. ons out of ach instruc

processor ing a cond is known. ons out of ach instruc

Computer Networking: A Top-Down Approach (7th Edition)
Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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A CPU has 6 stages pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline followed by instruction decode, calculate effective address, fetch operands, execute instruction and write back. A conditional branch instruction computes the target address and evaluates the condition in the fourth stage of the pipeline. The processor stops fetching new instructions following a condition branch until the branch outcome is known. A program executes 1010 instructions out of which 30% are conditional branch. If each instruction takes 2 cycle to complete on average, then total execution time of the program in seconds
Transcribed Image Text:A CPU has 6 stages pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline followed by instruction decode, calculate effective address, fetch operands, execute instruction and write back. A conditional branch instruction computes the target address and evaluates the condition in the fourth stage of the pipeline. The processor stops fetching new instructions following a condition branch until the branch outcome is known. A program executes 1010 instructions out of which 30% are conditional branch. If each instruction takes 2 cycle to complete on average, then total execution time of the program in seconds
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