Problem: A computer system uses 32-bit memory addresses and it has a main memory consisting of 1G bytes. It has a 4K-byte cache organized in the block-set-associative manner, vith 4 blocks per set and 64 bytes per block. (a) Calculate the number of bits in each of the Tag, Set, and Word fields of the memory address. (b) Assume that the cache is initially empty. Suppose that the processor fetches 1088 words of four bytes each from successive word locations starting at location 0. It then repeats this fetch sequence nine more times. If the cache is 10 times faster than the memory, estimate the improvement factor resulting from the use of the cache. Assume that the LRU algorithm is used for block replacement.

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
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Problem: A computer system uses 32-bit memory addresses and it has a main memory
consisting of 1G bytes. It has a 4K-byte cache organized in the block-set-associative manner,
with 4 blocks per set and 64 bytes per block.
(a) Calculate the number of bits in each of the Tag, Set, and Word fields of the memory
address.
(b) Assume that the cache is initially empty. Suppose that the processor fetches 1088
words of four bytes each from successive word locations starting at location 0. It
then repeats this fetch sequence nine more times. If the cache is 10 times faster than
the memory, estimate the improvement factor resulting from the use of the cache.
Assume that the LRU algorithm is used for block replacement.
Transcribed Image Text:Problem: A computer system uses 32-bit memory addresses and it has a main memory consisting of 1G bytes. It has a 4K-byte cache organized in the block-set-associative manner, with 4 blocks per set and 64 bytes per block. (a) Calculate the number of bits in each of the Tag, Set, and Word fields of the memory address. (b) Assume that the cache is initially empty. Suppose that the processor fetches 1088 words of four bytes each from successive word locations starting at location 0. It then repeats this fetch sequence nine more times. If the cache is 10 times faster than the memory, estimate the improvement factor resulting from the use of the cache. Assume that the LRU algorithm is used for block replacement.
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