Problem 1 Problem 1 has 5 parts (Question 1, Question2, Question3, Question 4 and Quest 5). V Saved Question 1 (3 points) Listen Cache memory is faster than the main memory O True False Question 2 (2 points) v Saved 4 Listen The following subtraction of two Hexadecimal number is correct. 8B02 - 7A02=1100 True False Question 3 (2 points) V Saved < Listen EDI register has a 16-bit lower part called DI. • True False Question 4 (2 points)

Problem 1 Problem 1 has 5 parts (Question 1, Question2, Question3, Question 4 and Quest 5). V Saved Question 1 (3 points) Listen Cache memory is faster than the main memory O True False Question 2 (2 points) v Saved 4 Listen The following subtraction of two Hexadecimal number is correct. 8B02 - 7A02=1100 True False Question 3 (2 points) V Saved < Listen EDI register has a 16-bit lower part called DI. • True False Question 4 (2 points)

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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2. Consider the following MIPS code segment being executed on machine M: lw $t1, 10(8t2) srl $t1, $t1, 16 lui $t3 0x7FFF ori $t3 0xFFFF Loop: xor $14, $t1, St3 add $t1, $t1, St4 all $t1, $t1, 16 bgt $t1, Szero, Loop sw $11, 1000(S13) Assume M has a clock frequency is 3.5 GHz. Also, assume that 1w needs 5 clock cycles, sw 4 clock cycles, bne 2 clock cycles, and all other instructions need 3 clock cycles to execute. Calculate the total amount of CPU-time (in nanoseconds) required to execute the above code.
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You are designing a computer and you have to choose between a write-through cache and a write-back cache. You know that this computer will mainly execute software A and B (it’s an embedded device). Software A is software dealing the navigation system of a car and it’s main task is to display a map on a screen. Informations (map,...) are stored in the memory and most of the accesses to the memory are therefore reading values from the memory. The software B is the central unit of the car getting information to different sources and sensors and providing to the dashboard and other units some informations (like speed, distance traveled the last minutes, average fuel comsumption for the last km,...). Therefore, the number of write to the memory has the same order of magnitude as the number of read to the memory. You have 3 possibilities: A) Use a write-through cache B) Use a write-back cache C) Have two versions of the computer, one for software A and one for software B and one version will…
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4- What should be the value of { N } loaded to CX register in the following assembly subroutine so that its execution time will be 150 µsec, if you know that the operating frequency of the microprocessor is 10 MHz? MySub Proc Near PUSH CX PUSH rog POP reg JNZ DEC reg ADD regreg ADD reg value 1IT MOV regreg MOV regvalue 41 27 8T MOV CX, N Back: NOP NOP 17/ST 164T LOOP CALL RET NOP 19T 3T LOOP Back РОР СХ 16T 3T RET 3T 4T MySub ENDP
O True O False Question 11 The decoding of 80x86 instructions are simpler than instructions in ARM processors. True O False D Question 12 All instructions of LEGV8 are 32 bits long. O True O False Question 13 In 80x86 assembly language, before calling a function or procedure, you must write a PUSH state address on the Stack. O True O False
Generate MIPS code for the following code segments assuming that all variables are in memory locations. clear steps
P 16. The assembly command ACALL is limited to how many address lines? a) 8 b) 11 c) 16 d) 20 17. When the EFM8BB1 acknowledges an interrupt, to which of the following ROM addresses does it most likely go? a) 0000H b) 0013H c) 0100H d) AFFF3H 18. After the following code executes, what value remains in the B register? MOV B, #128 MOV A, #2 MUL AB a) EFH b) EE H 8 DO 01 8 02 DJ Port 1 (Out 3 7 c) 01H F M a) all rows b) all columns 7 2 8 A 6 42 7% 1 5 9 M 7 XX 8 d) 00H F D C Am A A 03 02 01 DO ww m www www Port 2 On) Figure 2: Matrix Keyboard Connection to Ports of C 19. To detect a key press in the keyboard matrix shown in Figure 2, which of the following is grounded? Vec c) one row at a time d) both a and c
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The following equation was suggested both for cache memory and disk cache memory Ts = Tc + M * TD Generally this equation to a memory hierarch with N levels instead of just two levels. %3D