Please create a constraint file using the images below. The code that is in one of the images is a Verilog code for the M1 chart. Use the M1 chart and the Verilog code to create a constraint file. X0011M₁1YQ*0 Q no change1 Q'toggle00reset1 1set module flip_flop(input X, Youtput reg Q);always @(*) begincase({X, Y})2'b00: Q = Q; // no change2'b01: Q=~Q; // toggle2'b10: Q = 1'b0; // reset2'b11: Q = 1'b1; // setendcaseendendmodule

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Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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Please create a constraint file using the images below. The code that is in one of the images is a Verilog code for the M1 chart. Use the M1 chart and the Verilog code to create a constraint file.

X
0
0
1
1
M₁1
Y
Q*
0 Q no change
1 Q'
toggle
0
0
reset
1 1
set

module flip_flop(
input X, Y
output reg Q
);
always @(*) begin
case({X, Y})
2'b00: Q = Q; // no change
2'b01: Q=~Q; // toggle
2'b10: Q = 1'b0; // reset
2'b11: Q = 1'b1; // set
endcase
end
endmodule

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