PL has a2 KH drect opped ca.ie with te bock size. Suppone A is a twe tet al aray of sire 51212ith cleents atcupy s-tytes each Consider the fol w ing ACode segments, PI and P2 PI fori ,s12. i-1) fer tj-.12 P2: for ti-0: i512. i for (j- j512. j-) x+-AilE PI and P2 are executed independently with the same initial state, namely, the array A is met n the cache and i, j. x are ir registers. Let the number of cache misss experienced by PI be M; and that for P2 be M.

Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
Section: Chapter Questions
Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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Find value of M1

(PU has a 32 KB direct mpped ca.lie with
hte block size. Suppose A is a twe
ntensional array of sire 512 x12ith elements
at occupy 8-tytes ch. Consider the folowing
ACCode segments, Pl and P2
PI for i 0, i512 i-)
for tj-0. j12)
** Al l.
:
P: for ti-0; i:512; i
for (j-0; j512. j--)
x+-Ail [:!
Pl and P2 are executed independently with
the same initial state, namcly, the array A is
net m the cache and i, j. x are in registers. Let
the number of cache misses experienced by
PI be M; and that for P2 be M.
Transcribed Image Text:(PU has a 32 KB direct mpped ca.lie with hte block size. Suppose A is a twe ntensional array of sire 512 x12ith elements at occupy 8-tytes ch. Consider the folowing ACCode segments, Pl and P2 PI for i 0, i512 i-) for tj-0. j12) ** Al l. : P: for ti-0; i:512; i for (j-0; j512. j--) x+-Ail [:! Pl and P2 are executed independently with the same initial state, namcly, the array A is net m the cache and i, j. x are in registers. Let the number of cache misses experienced by PI be M; and that for P2 be M.
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