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Memory Performance: The following questions will refer to the same instruction mix as above, with the following additional information: Processor P1: 42% of all instructions are memory access instructions. Level 1 Cache Access=0.68 ns Main Memory Access - 59 ns 12% of all memory access is a "miss". 9. The clock rate of the processor = 10 The Average Memory Access Time for the given data- GHz. ns _cycles 11. The Average number of cycles for a memory access = 12. Assuming that the base CPI = 1.0 cycles, and using the answer from #11, the average time to complete an instruction for the program described ns 8

Memory Performance: The following questions will refer to the same instruction mix as above, with the following additional information: Processor P1: 42% of all instructions are memory access instructions. Level 1 Cache Access=0.68 ns Main Memory Access - 59 ns 12% of all memory access is a "miss". 9. The clock rate of the processor = 10 The Average Memory Access Time for the given data- GHz. ns _cycles 11. The Average number of cycles for a memory access = 12. Assuming that the base CPI = 1.0 cycles, and using the answer from #11, the average time to complete an instruction for the program described ns 8

Database System Concepts
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
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Please help with this Computer architecture homework question.
Memory Performance: The following questions will refer to the same instruction mix as above, with the following additional information: Processor P1: 42% of all instructions are memory access instructions. Level 1 Cache Access = 0.68 ns qys-bood Main Memory Access = 59 ns 12% of all memory access is a "miss". 9. The clock rate of the processor = GHz. 10 The Average Memory Access Time for the given data = 11. The Average number of cycles for a memory access = cycles 12. Assuming that the base CPI = 1.0 cycles, and using the answer from #11, momolami swo 990012 nsmenimse of grie ns the verage time to complete an instruction for the program described = Now, consider processor P2, with the addition of a Level 2 Cache, with an access time of ob bazilogi adt of f 4.3 ns and a "hit" rate of 13%. ns ns for P2. 13. The Average Memory Access Time for the given data = cycles and murgo novig on T 14. The Average number of cycles for a memory access = om ancitourtani beold) to 15. Assuming that the base CPI = 1.0 cycles, and using the answer from #14, (slabo ganlups) yag events aquest bus batoibosqim alle als cycles dondolo the average CPI for the program described = ino-stupor 16. Which processor performs better for the program described? (P1 or P2)sol lai 19q 17. Including the delays in the Pipelined DataPath in question 8, and the memory performance analysis in question 15, find the Average Memory Access = 18. Find the final average effective number of cycles for processor P2 = 19. Find the final average time to complete an instruction for processor P2 =_ 3971
Transcribed Image Text:Memory Performance: The following questions will refer to the same instruction mix as above, with the following additional information: Processor P1: 42% of all instructions are memory access instructions. Level 1 Cache Access = 0.68 ns qys-bood Main Memory Access = 59 ns 12% of all memory access is a "miss". 9. The clock rate of the processor = GHz. 10 The Average Memory Access Time for the given data = 11. The Average number of cycles for a memory access = cycles 12. Assuming that the base CPI = 1.0 cycles, and using the answer from #11, momolami swo 990012 nsmenimse of grie ns the verage time to complete an instruction for the program described = Now, consider processor P2, with the addition of a Level 2 Cache, with an access time of ob bazilogi adt of f 4.3 ns and a "hit" rate of 13%. ns ns for P2. 13. The Average Memory Access Time for the given data = cycles and murgo novig on T 14. The Average number of cycles for a memory access = om ancitourtani beold) to 15. Assuming that the base CPI = 1.0 cycles, and using the answer from #14, (slabo ganlups) yag events aquest bus batoibosqim alle als cycles dondolo the average CPI for the program described = ino-stupor 16. Which processor performs better for the program described? (P1 or P2)sol lai 19q 17. Including the delays in the Pipelined DataPath in question 8, and the memory performance analysis in question 15, find the Average Memory Access = 18. Find the final average effective number of cycles for processor P2 = 19. Find the final average time to complete an instruction for processor P2 =_ 3971
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