A generic microcontroller has eight data lines and eight address lines. This device is to be connected to four 16 x 8 bit ROM modules. Each ROM has 4 address pins, 8 data pins and a single pin that functions as both a Chip Enable and Read signal. i) Illustrate in a diagram how the ROMs can be interfaced with the microcontroller in such a way that they can be individually accessed without any additional logic gates. You must explain your arrangement. ii) Show where each of the ROM devices appears within the microcontroller's memory map with your design and state any potential considerations. INTI INTO Timer 2 (8032/8052) Timer 1 Timer 0 128 bytes ROM RAM Timer 2 (8032/8052) -T2 -T2EX Serial port (8032/8052) OK-8031 Timer 1 Interrupt Other 128 bytes control (1) registers RAM (2 OK 8032 4K 8051 SK-803 Timer (4 CPU 5 Oscillator Bus control I/O ports Serial (6) port H EA- RST ALE PSEN PO P1 P2 P3 TXD RXD Address/data "Alternate pin assignments for Pl and P3

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A generic microcontroller has eight data lines and eight address lines. This device is
to be connected to four 16 x 8 bit ROM modules. Each ROM has 4 address pins, 8
data pins and a single pin that functions as both a Chip Enable and Read signal.
i) Illustrate in a diagram how the ROMs can be interfaced with the microcontroller
in such a way that they can be individually accessed without any additional
logic gates. You must explain your arrangement.
ii) Show where each of the ROM devices appears within the microcontroller's
memory map with your design and state any potential considerations.
Transcribed Image Text:A generic microcontroller has eight data lines and eight address lines. This device is to be connected to four 16 x 8 bit ROM modules. Each ROM has 4 address pins, 8 data pins and a single pin that functions as both a Chip Enable and Read signal. i) Illustrate in a diagram how the ROMs can be interfaced with the microcontroller in such a way that they can be individually accessed without any additional logic gates. You must explain your arrangement. ii) Show where each of the ROM devices appears within the microcontroller's memory map with your design and state any potential considerations.
INTI
INTO
Timer 2 (8032/8052)
Timer 1
Timer 0
128 bytes
ROM
RAM
Timer 2
(8032/8052)
-T2
-T2EX
Serial port
(8032/8052) OK-8031
Timer 1
Interrupt
Other
128 bytes
control (1) registers
RAM (2
OK 8032
4K 8051
SK-803
Timer (4
CPU
5
Oscillator
Bus control
I/O ports
Serial (6)
port
H
EA-
RST
ALE
PSEN
PO P1 P2 P3
TXD RXD
Address/data
"Alternate pin assignments for Pl and P3
Transcribed Image Text:INTI INTO Timer 2 (8032/8052) Timer 1 Timer 0 128 bytes ROM RAM Timer 2 (8032/8052) -T2 -T2EX Serial port (8032/8052) OK-8031 Timer 1 Interrupt Other 128 bytes control (1) registers RAM (2 OK 8032 4K 8051 SK-803 Timer (4 CPU 5 Oscillator Bus control I/O ports Serial (6) port H EA- RST ALE PSEN PO P1 P2 P3 TXD RXD Address/data "Alternate pin assignments for Pl and P3
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