In general, a cache is named according to the amount of data it contains (i.e., a 4 KiB cache can hold 4 KiB of data); however, caches also require SRAM to store metadata such as tags and valid bits. You design this cache memory and will examine how a cache's configuration affects the total amount of SRAM needed to implement it as well as the performance of the cache. For all parts, assume that the that addresses and words are 64 bits. (A) Calculate the total number of bits required to implement a 32 KiB cache with two-word blocks. (B) Calculate the total number of bits required to implement a 96 KiB cache with 16-word blocks. How much bigger is this cache than the 32 KiB cache described in (A) above? (Notice that, by changing the block size, we increased the amount of data without doubling the total size of the cache.) (C) Explain why this 96 KiB cache, despite its larger data size, might provide slower performance than the first cache.

In general, a cache is named according to the amount of data it contains (i.e., a 4 KiB cache can hold 4 KiB of data); however, caches also require SRAM to store metadata such as tags and valid bits. You design this cache memory and will examine how a cache's configuration affects the total amount of SRAM needed to implement it as well as the performance of the cache. For all parts, assume that the that addresses and words are 64 bits. (A) Calculate the total number of bits required to implement a 32 KiB cache with two-word blocks. (B) Calculate the total number of bits required to implement a 96 KiB cache with 16-word blocks. How much bigger is this cache than the 32 KiB cache described in (A) above? (Notice that, by changing the block size, we increased the amount of data without doubling the total size of the cache.) (C) Explain why this 96 KiB cache, despite its larger data size, might provide slower performance than the first cache.

Computer Networking: A Top-Down Approach (7th Edition)

7th Edition

ISBN:9780133594140

Author:James Kurose, Keith Ross

Publisher:James Kurose, Keith Ross

Chapter1: Computer Networks And The Internet

Section: Chapter Questions

Problem R1RQ: What is the difference between a host and an end system? List several different types of end...

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Question

In general, a cache is named according to
the amount of data it contains (i.e., a 4 KİB
cache can hold 4 KiB of data); however,
caches also require SRAM to store metadata
such as tags and valid bits. You design this
cache memory and will examine how a
cache's configuration affects the total
amount of SRAM needed to implement it as
well as the performance of the cache. For all
parts, assume that the that addresses and
words are 64 bits.
(A) Calculate the total number of bits
required to implement a 32 KİB cache with
two-word blocks.
(B) Calculate the total number of bits
required to implement a 96 KiB cache with
16-word blocks. How much bigger is thi
cache than the 32 KiB cache described in (A)
above? (Notice that, by changing the block
size, we increased the amount of data
without doubling the total size of the cache.)
(C) Explain why this 96 KiB cache, despite its
larger data size, might provide slower
performance than the first cache.

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Question 4
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