Implement Y = X1.X2+X1.X3 with Pass Transistor Logic by using only NMOS transistors with an order of X1-X2-X3.. a) Draw the circuit. b) Suppose that the output capacitor of the circuit is CL=0.1pF. Neglect other node capacitors. Also the equivalent resistor for an NMOS transistor is Reg=10kQ. Find the propagation delay if the inputs change from X1=0, X2=1, X3=1 to X1=0, X2=0, X3=0.
Implement Y = X1.X2+X1.X3 with Pass Transistor Logic by using only NMOS transistors with an order of X1-X2-X3.. a) Draw the circuit. b) Suppose that the output capacitor of the circuit is CL=0.1pF. Neglect other node capacitors. Also the equivalent resistor for an NMOS transistor is Reg=10kQ. Find the propagation delay if the inputs change from X1=0, X2=1, X3=1 to X1=0, X2=0, X3=0.
Introductory Circuit Analysis (13th Edition)
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Transcribed Image Text:Implement
Y = X1.X2+ X1.X3 with Pass Transistor Logic by using only NMOS transistors
with an order of X1-X2-X3..
a) Draw the circuit.
b) Suppose that the output capacitor of the circuit is CL=0.1pF. Neglect other node
capacitors. Also the equivalent resistor for an NMOS transistor is Reg=10kQ. Find the
propagation delay if the inputs change from X1=0, X2=1, X3=1 to X1=0, X2=0, X3=0.
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