I know the answer with almost all steps. I'm only asking some. How is the transition from time diagram to state table? Could you please explain in writing? No need for other parts of the question.so my question is, how to find next states with input and output from this time diagram?

Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
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Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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I know the answer with almost all steps. I'm only asking some. How is the transition from time diagram to state table? Could you please explain in writing? No need for other parts of the question.so my question is, how to find next states with input and output from this time diagram?

Design and implement sequential digital circuit, with following specifications:
It has one input X, two outputs Y1 and YO.
Whenever an active HIGH is observed at input X at the active clock edge, circuit initiates a sequence and
generates output waveforms given in figure below. (After the sequence is completed, it walts for input to be
HIGH again)
a) Use AND, OR, NOT gates and D type edge triggered flip-flops.
Hint:
Describe the circuit model
Draw the State Diagram
Find the State Table
Make State Assignment with increasing numbers. (i.e. 0,1,2,3.)
Write State and Output equations
Draw the Circuit.
b) Use 74HC00, 74HC74 Integrated circuits for the implementation.
c) Use 74HC00, 74HC138 Integrated circuits for the implementation.
restart or
restart or
retart or
wtotion of
rew seguence
intation of
seuence
intiation of
ends hee
new sequenoe
new sequence
YO
Y1
0 0
o waiting
eample
long watine
typical esampie
eampie
1.
1.
1.
Transcribed Image Text:Design and implement sequential digital circuit, with following specifications: It has one input X, two outputs Y1 and YO. Whenever an active HIGH is observed at input X at the active clock edge, circuit initiates a sequence and generates output waveforms given in figure below. (After the sequence is completed, it walts for input to be HIGH again) a) Use AND, OR, NOT gates and D type edge triggered flip-flops. Hint: Describe the circuit model Draw the State Diagram Find the State Table Make State Assignment with increasing numbers. (i.e. 0,1,2,3.) Write State and Output equations Draw the Circuit. b) Use 74HC00, 74HC74 Integrated circuits for the implementation. c) Use 74HC00, 74HC138 Integrated circuits for the implementation. restart or restart or retart or wtotion of rew seguence intation of seuence intiation of ends hee new sequenoe new sequence YO Y1 0 0 o waiting eample long watine typical esampie eampie 1. 1. 1.
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