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G. For the given circuit What could be done to increase Ay for the circuit? and determine the new value of Av.

G. For the given circuit What could be done to increase Ay for the circuit? and determine the new value of Av.

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
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G. For the given circuit What could be done to increase Ay for the circuit? and determine the new value of Ay.
Transcribed Image Text:G. For the given circuit What could be done to increase Ay for the circuit? and determine the new value of Ay.
Given circuit The maximum values are determined as, Vps = 25 V VGs = 25 V VGS-OFF = -4 V Small Signal JFET Amplifier Self-biased Circuit VDD 20V Ipss = 30 mA Design Specifications: Av = 9 (gain ratio) Id = 8mA 3RD A minimum value of transconductance will be C5 Vout 8s = 10000 umhos Drain Q2 J309 2.2µF C4 V A, = Gate Vin 2.2µF Source Ins Ro SRG The equation for drain current is obtained as, ERS 20 VDp - IpsRp – Vps - IpsRs = 0 Voo-Vrs Ips = Rok, 0.8-RD Ips = V 5 Applying KVL in drain to source circuit -: info that may be useful on the right VDD - IDRD – Vps - IşRs = 0------ 1) Putting value in equation -1) with the help of table (Rp + Rs) = Vrn - Vos 20 – 10 = .25 K2 ---- 2) Applying KVL in gate to source circuit -: -VGs - 1sRs = 0 Ip = 3) Rs = 4) With the help of the table putting minimum value in equation -4) Rs - - - 250 2----5) Putting equation -5) in equation -1) Rp = 1.25 KN – 2502
Transcribed Image Text:Given circuit The maximum values are determined as, Vps = 25 V VGs = 25 V VGS-OFF = -4 V Small Signal JFET Amplifier Self-biased Circuit VDD 20V Ipss = 30 mA Design Specifications: Av = 9 (gain ratio) Id = 8mA 3RD A minimum value of transconductance will be C5 Vout 8s = 10000 umhos Drain Q2 J309 2.2µF C4 V A, = Gate Vin 2.2µF Source Ins Ro SRG The equation for drain current is obtained as, ERS 20 VDp - IpsRp – Vps - IpsRs = 0 Voo-Vrs Ips = Rok, 0.8-RD Ips = V 5 Applying KVL in drain to source circuit -: info that may be useful on the right VDD - IDRD – Vps - IşRs = 0------ 1) Putting value in equation -1) with the help of table (Rp + Rs) = Vrn - Vos 20 – 10 = .25 K2 ---- 2) Applying KVL in gate to source circuit -: -VGs - 1sRs = 0 Ip = 3) Rs = 4) With the help of the table putting minimum value in equation -4) Rs - - - 250 2----5) Putting equation -5) in equation -1) Rp = 1.25 KN – 2502
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