g synchronous state machi two outputs. The outputs a /s equal to (O0) unless one llowing cases occurs: 1. If t ent input value is greater th

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
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A 2-bit binary comparator designed
by using synchronous state machine
has two outputs. The outputs are
always equal to (00) unless one of
the following cases occurs: 1. If the
present input value is greater than
the previous input value, the first
and second outputs are logic “1" and
logic "O", respectively. 2. If the
present input value is less than the
previous input value, the first and
second outputs are logic "O" and
logic "1", respectively. How many
states are required to draw minimal
Mealy state diagram for the
* ?aforementioned state machine
2
8.
7 O
5 O
Transcribed Image Text:A 2-bit binary comparator designed by using synchronous state machine has two outputs. The outputs are always equal to (00) unless one of the following cases occurs: 1. If the present input value is greater than the previous input value, the first and second outputs are logic “1" and logic "O", respectively. 2. If the present input value is less than the previous input value, the first and second outputs are logic "O" and logic "1", respectively. How many states are required to draw minimal Mealy state diagram for the * ?aforementioned state machine 2 8. 7 O 5 O
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