For the JK Flip Flop application in Slide 13 for the 3-bit ripple counter, the CLK signal is connected as shown: CLK C K B CLK B K E CLK A K *All Jand K inputs assumed to be 1. Discuss what happens to the Count output when the CLK is connected to the Q instead of the Q' output for each stage and what type of counter is this? What is the modulus?

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For the JK Flip Flop application in Slide 13 for the 3-bit ripple
counter, the CLK signal is connected as shown:
****
CLK
CLK
CLK
All Jand K
inputs assumed
to be 1.
Discuss what happens to the Count output when the CLK is
connected to the Q instead of the Q' output for each stage and
what type of counter is this?
What is the modulus?
16
Transcribed Image Text:For the JK Flip Flop application in Slide 13 for the 3-bit ripple counter, the CLK signal is connected as shown: **** CLK CLK CLK All Jand K inputs assumed to be 1. Discuss what happens to the Count output when the CLK is connected to the Q instead of the Q' output for each stage and what type of counter is this? What is the modulus? 16
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