For the DBPSK modulator shown in Figure 40a (page 93), determine th output phase sequence for the following input bit sequence: 0110011010101 (assume that the reference bit 1). 0*180°0°0°0*180°0°o°0°180°180°0°0*180°180°0*180° 10111011100110010 180°0°0°0180°0°0°0180°180°180°0°0180°180°0°0° 01110111000110011

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