Fill the following table for the cache hierarchy described, using the definition terminology used in class and the notes. A 256KİB L2 cache is 8-way associative with 64B block şize. It is part of a 32-bit architecture. Just write a number no unit needed to attach! (1) A (associativity) 8 filled for you %3D (2) C (number of lines)= 32 (3) K (block length) 64 %3D (4) number of bit for a line offset/index 64 %3D (5) number of bit for a block offset/index- 32 %3D (6) T num of bit of tag= 96
Fill the following table for the cache hierarchy described, using the definition terminology used in class and the notes. A 256KİB L2 cache is 8-way associative with 64B block şize. It is part of a 32-bit architecture. Just write a number no unit needed to attach! (1) A (associativity) 8 filled for you %3D (2) C (number of lines)= 32 (3) K (block length) 64 %3D (4) number of bit for a line offset/index 64 %3D (5) number of bit for a block offset/index- 32 %3D (6) T num of bit of tag= 96
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
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Explain me step by step please I’m providing answers though 1 is 8 2 is 512 ,3 is 64, 4 is 9 or 9 bit, 5 is 6 bit or 6, 7 is 17bit or 17.
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