Figure 4 shows the circuit diagram for a single stage NMOS amplifier realized with the transistor M1. Q4 VDD Rp Vout M1 Vin Cp CG RL R2 CG Rs Cs

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Figure 4 shows the circuit diagram for a single stage NMOS amplifier realized with
the transistor M1.
Q4
VDD
R1
Rp
V out
M1
Vin
CG
RL
R2
CG
Rs
Cs
Vss = 0 V
Figure 4
(a)
What kind of amplifier is M1 part of? Justify your description.
Draw the small signal equivalent model of circuit in Figure 4 and, by using the
Miller Theorem and the open-circuit time-constant method, design the amplifier
to operate with a lower frequency pole fpi = 100 MHz, given that the output
impedance of the signal generator is Ro = 50 Ohm, the mid-band frequency
range of the amplifier is Gv = 10 and the gate to source and gate to drain
capacitors are Cgd = Cgs = 4 pF, respectively. For your design you are given that
if R2 / R1 < 3 then M1 is off. State any assumption and justify your choices.
(b)
Transcribed Image Text:Figure 4 shows the circuit diagram for a single stage NMOS amplifier realized with the transistor M1. Q4 VDD R1 Rp V out M1 Vin CG RL R2 CG Rs Cs Vss = 0 V Figure 4 (a) What kind of amplifier is M1 part of? Justify your description. Draw the small signal equivalent model of circuit in Figure 4 and, by using the Miller Theorem and the open-circuit time-constant method, design the amplifier to operate with a lower frequency pole fpi = 100 MHz, given that the output impedance of the signal generator is Ro = 50 Ohm, the mid-band frequency range of the amplifier is Gv = 10 and the gate to source and gate to drain capacitors are Cgd = Cgs = 4 pF, respectively. For your design you are given that if R2 / R1 < 3 then M1 is off. State any assumption and justify your choices. (b)
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