Exercise 1.4 Consider two different implementations of the same instruction set architecture. There are four classes of instructions, A, B, C, and D. The clock rate and CPI of each implementation are given in the following table. CPI Class B CPI Class C CPI Class D Clock rate CPI Class A P1 1.5 GHz 1 2 3 P2 2 GHz 2 2 2 4 2 1.4.1 [10] <1.4> Given a program with 10" instructions divided into classes as follows: 10% class A, 20% class B, 50% class C and 20% class D, which implemen- tation is faster? 1.4.2 [5] <1.4> What is the global CPI for each implementation? 1.4.3 [5] <1.4> Find the clock cycles required in both cases. The following table shows the number of instructions for a program. Arith 500 Store 50 Load 100 Branch 50 Total 700 1.4.4 [5] <1.4> Assuming that arith instructions take I cycle, load and store 5 cycles and branch 2 cycles, what is the execution time of the program in a 2 GHz processor? 1.4.5 [5] <1.4> Find the CPI for the program. 1.4.6 [10] <1.4> If the number of load instructions can be reduced by one-half, what is the speed-up and the CPI?

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Exercise 1.4
Consider two different implementations of the same instruction set architecture.
There are four classes of instructions, A, B, C, and D. The clock rate and CPI of each
implementation are given in the following table.
CPI Class B CPI Class C CPI Class D
Clock rate CPI Class A
P1
1.5 GHz
1
2
3
P2
2 GHz
2
2
2
4
2
1.4.1 [10] <1.4> Given a program with 10" instructions divided into classes as
follows: 10% class A, 20% class B, 50% class C and 20% class D, which implemen-
tation is faster?
1.4.2 [5] <1.4> What is the global CPI for each implementation?
1.4.3 [5] <1.4> Find the clock cycles required in both cases.
The following table shows the number of instructions for a program.
Arith
500
Store
50
Load
100
Branch
50
Total
700
1.4.4 [5] <1.4> Assuming that arith instructions take I cycle, load and store 5
cycles and branch 2 cycles, what is the execution time of the program in a 2 GHz
processor?
1.4.5 [5] <1.4> Find the CPI for the program.
1.4.6 [10] <1.4> If the number of load instructions can be reduced by one-half,
what is the speed-up and the CPI?
Transcribed Image Text:Exercise 1.4 Consider two different implementations of the same instruction set architecture. There are four classes of instructions, A, B, C, and D. The clock rate and CPI of each implementation are given in the following table. CPI Class B CPI Class C CPI Class D Clock rate CPI Class A P1 1.5 GHz 1 2 3 P2 2 GHz 2 2 2 4 2 1.4.1 [10] <1.4> Given a program with 10" instructions divided into classes as follows: 10% class A, 20% class B, 50% class C and 20% class D, which implemen- tation is faster? 1.4.2 [5] <1.4> What is the global CPI for each implementation? 1.4.3 [5] <1.4> Find the clock cycles required in both cases. The following table shows the number of instructions for a program. Arith 500 Store 50 Load 100 Branch 50 Total 700 1.4.4 [5] <1.4> Assuming that arith instructions take I cycle, load and store 5 cycles and branch 2 cycles, what is the execution time of the program in a 2 GHz processor? 1.4.5 [5] <1.4> Find the CPI for the program. 1.4.6 [10] <1.4> If the number of load instructions can be reduced by one-half, what is the speed-up and the CPI?
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