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Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
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A non pipelined X has a clock rate of 25 MHz
and an average CPI (Cycles Per Instruction) of 4.
Processor Y ,an improved successor of X, is
designed with a five stage linear pipeline
.However due to latch delay and clock skew
effects , the clock rate of Y is only 20 MHz.
Calculate the MIPS rate of non pipeline and
pipeline processor during the execution of this
particular program.
Transcribed Image Text:A non pipelined X has a clock rate of 25 MHz and an average CPI (Cycles Per Instruction) of 4. Processor Y ,an improved successor of X, is designed with a five stage linear pipeline .However due to latch delay and clock skew effects , the clock rate of Y is only 20 MHz. Calculate the MIPS rate of non pipeline and pipeline processor during the execution of this particular program.
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