Draw a logic diagram of a four-bit register with four D flip-flops and four 4 x 1 multiplexers with mode selection inputs for S1 and SO. The register operates according to the following function table. S1 so Register Operation No change 1 Complement the four outputs 1 Clear the register to 0 (synchronous with clock) 1 1 Load parallel data

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Draw a logic diagram of a four-bit register with four D flip-flops and four 4 x1 multiplexers with mode
selection inputs for S1 and SO. The register operates according to the following function table.
S1
so
Register Operation
No change
Complement the four outputs
1
Clear the register to 0 (synchronous with clock)
1
1
Load parallel data
Transcribed Image Text:Draw a logic diagram of a four-bit register with four D flip-flops and four 4 x1 multiplexers with mode selection inputs for S1 and SO. The register operates according to the following function table. S1 so Register Operation No change Complement the four outputs 1 Clear the register to 0 (synchronous with clock) 1 1 Load parallel data
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