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Design a synchronous counter using J-K FFs

Design a synchronous counter using J-K FFs

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...
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Problem 4: Design a synchronous counter using J-K FFs that has the following sequence CBA: 001, 011, 100 and 111, and repeat. Follow the CBA notation: A is the least significant bit and must be on the right, and Cis the most significant B, and most be on the left. The undesired (unused) states CBA: 000, 010, 101 and 110 must always go to XXX (don't care). Solve this problem following the steps indicated in slides 29 through 36 in Chapter 7.pdf. Step-by-step, do not miss any of the steps. For Step 3 and 4, use the following table: PRESENT State NEXT Štate A B A Jc Kc Jg Kg JA KA X 1 X X X X X 1 X X For the Karnaugh maps, follow the following notation: Ā A CB CB CB CB
Transcribed Image Text:Problem 4: Design a synchronous counter using J-K FFs that has the following sequence CBA: 001, 011, 100 and 111, and repeat. Follow the CBA notation: A is the least significant bit and must be on the right, and Cis the most significant B, and most be on the left. The undesired (unused) states CBA: 000, 010, 101 and 110 must always go to XXX (don't care). Solve this problem following the steps indicated in slides 29 through 36 in Chapter 7.pdf. Step-by-step, do not miss any of the steps. For Step 3 and 4, use the following table: PRESENT State NEXT Štate A B A Jc Kc Jg Kg JA KA X 1 X X X X X 1 X X For the Karnaugh maps, follow the following notation: Ā A CB CB CB CB
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