Design a combinational circuit with four input lines that represent a decimal digit in BCD and four output lines that generate that 9's complement of the input digit. Note that there are four input and output bits and any input combination not defined as BCD will have a don't care output. Show the truth table for the circuit.

I need to implement the 1-4 with 1-bit demultiplexer in a diagram. How to draw it. and how to do the final equation

Give the output signals for the circuit if the input signals are as indicated. A logic circuit with 4 gates and 3 inputs. The circuit will be read from the final output to the inputs. The final OR gate has two inputs, the gate has output S. The first input to the final OR gate is the output from an OR gate. The OR gate has two inputs. The first input to the OR gate is P. The second input to the OR gate is Q. The second input to the final OR gate is the output from a NOT gate. The NOT gate has one input. The first input to the NOT gate is the output from an AND gate. The AND gate has two inputs. The first input to the AND gate is Q. The second input to the AND gate is R. input signals:  P = 0, Q = 0, R = 1 S =

Consider the following registers - AX contains 1122h, BX contains 3344h, CX contains 5566h and DX contains 7788h. ( You don't need to write code for this part) Write code to consolidate these value to two 32-bit registers - EAX and ECX. After executing your code, EAX should contain 11223344h and ECX should contain 77885566h. You are NOT allowed to mov any immediate values to the registers. h. Add a File Record Audio Listen

I was able to fill out the truth table for part A. I ONLY need help for PART B.  B) Implement the logic function (z) using the multiplexer 74HC151 shows in the picture.

Write a VHDL code for the following simple logic circuit. D- X1 X2 f X3

QUESTION 8 (NEED A NEAT HAND WRITING SOLUTION ONLY OTHERWISE WILL LEAVE A DOWNVOTE)

Logic circuit Design combinational logic circuit that takes 7 bit numbers and an input and output will be the reverse of this bits from right to left to the first one including one and remaining of the bits will be the same example input 0011000 output 0010111 Can you draw it’s logic circuit in detail not theory answer and if we can solve this question multiplexer

b. Complete the following two operations. Compute the result for -3810 – 8610 using 8-bit 2's | Compute the result for -3810 – 8610 using 8-bit 1's complement operation. Verify if the result is correct. complement operation. Verify if the result is correct. If not, explain why. If not, explain why.

Digital Logic Design4-bit Binary Adder / Subtractor