Design a 4-bit synchronous counter that counts in 2,4,2,1 code. The counter shall count all Odd numbers in the 2,4,2,1 code. Use the minimum number of clocked JK flip flops and any necessary logic gates to build this counter. Note: treating the unused state don't care con dition s. 1. Write down the excitation table of the JK flip flop. 2 Draw the state diagram of the counter 3. Specify how many flip flop required to build this counter (explain your answer)? 4 Write down the transition table. 5 Use k-maps to find the equations of the flip flop inputs. 6. Plot the logic circuit of your counter.
Design a 4-bit synchronous counter that counts in 2,4,2,1 code. The counter shall count all Odd numbers in the 2,4,2,1 code. Use the minimum number of clocked JK flip flops and any necessary logic gates to build this counter. Note: treating the unused state don't care con dition s. 1. Write down the excitation table of the JK flip flop. 2 Draw the state diagram of the counter 3. Specify how many flip flop required to build this counter (explain your answer)? 4 Write down the transition table. 5 Use k-maps to find the equations of the flip flop inputs. 6. Plot the logic circuit of your counter.
Introductory Circuit Analysis (13th Edition)
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ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
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Transcribed Image Text:Design a 4-bit synchronous counter that counts in 2,4,2,1 code. The counter shall count
all Odd numbers in the 2,4,2,1 code. Use the minimum number of clocked JK flip flops
and any necessary logic gates to build this counter.
Note: treating the unused state don't care con ditions.
1. Write down the excitation table of the JK flip flop.
2. Draw the state diagram of the counter
3. Specify how many flip flop required to build this counter (explain your answer)?
4 Write down the transition table.
5 Use k-maps to find the equations of the flipflop inputs.
6. Plot the logic circuit of your counter.
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