SUT d) Assume that you need to multiply an 8-bit 2's Complement binary number P by 35, i.e. F = P x 35. Using only adders and shifters, show how the operation can UTM UTMC for the output F in order to avoid overflow?

1. Gray code to Binary converter: Gray code is one of the codes used in digital systems. It has the advantage over binary numbers that only one bit in the code word changes when going from one number to the next. (See Table 1). Design a combinational circuit with 4 inputs and 4 outputs that converts a four- bit gray code number into an equivalent four-bit Binary number. Use Karnaugh map technique for simplification. Use LogicWorks for pre-lab demonstrations. Select the library "7400dev.clf* in the Parts Palette and then select the XOR chip 74-86. This would give you a set of 4 XOR's as shown in Fig. 1, just like the hardware chip 74-86. You could use as many as needed from these XOR gates in your design. Get back to ALL LIBRARIES and select switches for the inputs and Binary Probes as indicators of the outputs. Verify your design in the pre-Lab. During the Lab construct the circuit and verify its operations.

Consider the following runtime stack: BEFORE 00001000 00000006 ESP 00000FFC 00000FF 8 00000FF 4 00000FF0 What would be the value of ESP after pushing the 32-bit value shown below onto the stack? 000000A5 O 00001020 O 00000FF8 O 00000FFC O 000000A5

Assume the values yourself and solve it please

Q2.) What is the state of SISO five bit shift register if initial state is 10011? Di Do Sbit CLK CLK Di CLK Q1 Q2 Q3 Q4 Q5 1 1 4

What is the hexadecimal value stored in Register A after the following assembler has executed? LDA #0x71 NOTA NOTA LDR B,#0x71 ADC A,B LDR B,#0xEB ADC A,B NOTA LDR B,#0xD5 ADC A,B LDR B,#0x53 SBC A,B LDR B,#0x19 SBC A,B LDR B,#0x5E SBC A,B

A logic function is expressed by the equation = 0.1.8.9.4. Plot the the values on the K-map below Note: w is the msb (most significant bit) 3 x 10 0- - W X 1 00 01 Write the simplified Sum of Products (SOP) expression. Use yz WIM or "" for NOT; 11 10 for AND; "+" for OR (without the quotation marks.

Complete the Hamming code below for the given 4-bit hex values. Insert the ODD parity bits into positions 1, 2, and 4. For this problem, P means POSITION, not parity. The parity bit in P1 checks bits P1, P3, P5, and P7. The parity bit in P2 checks bits P2, P3, P6, and P7. The parity bit in P4 checks bits P4, P5, P6, and P7. Hex 0: 7: A: P1 P2 P3 0 P4 P5 0 1 ? P6 0 1 ? P7 0 1 ?

Q4 A-Design Parallel load/Shift right 4 bit register with LD/SR signal. If LD/SR =1 then register parallel load from D3D2DIDO inputs. If LD/SR =0 then it shifts right. Use standard logic gates and D F-F.

(c) A 4-bit ripple adder has inputs 1101 and 1001, and carry in = 0. What would the output of the adder including the carry out? If the inputs are considered as signed numbers using 2's complement representation, explain briefly whether there has been an overflow or not.